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Commit 70d7aebe authored by Michael Turquette's avatar Michael Turquette
Browse files

Merge tag 'meson-clk-for-v4.16-2' of git://github.com/BayLibre/clk-meson into clk-meson 

Second round of meson clock updates for v4.16

* Rename clock lock to help in case of lockdep issues
* Initial axg support
parents 8049d811 78b4af31

Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt

+5 −2
Original line number Diff line number Diff line
@@ -5,8 +5,11 @@ controllers within the SoC. 


Required Properties:



- compatible: should be "amlogic,gxbb-clkc" for GXBB SoC,

	      or "amlogic,gxl-clkc" for GXL and GXM SoC.

- compatible: should be:

		"amlogic,gxbb-clkc" for GXBB SoC,

		"amlogic,gxl-clkc" for GXL and GXM SoC,

		"amlogic,axg-clkc" for AXG SoC.



- reg: physical base address of the clock controller and length of memory

       mapped region.

arch/arm64/Kconfig.platforms

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Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ config ARCH_MESON 
	select PINCTRL_MESON

	select COMMON_CLK_AMLOGIC

	select COMMON_CLK_GXBB

	select COMMON_CLK_AXG

	select MESON_IRQ_GPIO

	help

	  This enables support for the Amlogic S905 SoCs.

drivers/clk/meson/Kconfig

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Original line number Diff line number Diff line
@@ -19,3 +19,11 @@ config COMMON_CLK_GXBB 
	help

	  Support for the clock controller on AmLogic S905 devices, aka gxbb.

	  Say Y if you want peripherals and CPU frequency scaling to work.



config COMMON_CLK_AXG

	bool

	depends on COMMON_CLK_AMLOGIC

	select RESET_CONTROLLER

	help

	  Support for the clock controller on AmLogic A113D devices, aka axg.

	  Say Y if you want peripherals and CPU frequency scaling to work.

drivers/clk/meson/Makefile

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@@ -5,3 +5,4 @@ 
obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o clk-audio-divider.o

obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o

obj-$(CONFIG_COMMON_CLK_GXBB)	 += gxbb.o gxbb-aoclk.o gxbb-aoclk-regmap.o gxbb-aoclk-32k.o

obj-$(CONFIG_COMMON_CLK_AXG)	 += axg.o

drivers/clk/meson/axg.c

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