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Commit 70b07a6f authored by Gaurav Jindal's avatar Gaurav Jindal
Browse files

msm: camera: tfe: Optimize CSID IRQ logging 



CSID error IRQ logs can sometimes lead to stability issues especially
if the serial logs are enabled.
Optimize the CSID error IRQ logs. Also make the Reset IRQ logs
debugfs based.

Change-Id: Ic0e0a297fd75523634f84dbf7d7f2bee5a2ff78c
CRs-Fixed: 2616316
Signed-off-by: default avatarGaurav Jindal <gjindal@codeaurora.org>
parent 6d2eb031

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_csid_hw/cam_tfe_csid_core.c

+68 −21
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/iopoll.h>
@@ -1834,6 +1834,10 @@ static int cam_tfe_csid_reset_retain_sw_reg( 
	struct cam_hw_soc_info          *soc_info;



	soc_info = &csid_hw->hw_info->soc_info;



	/* Mask top interrupts */

	cam_io_w_mb(0, soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_top_irq_mask_addr);

	/* clear the top interrupt first */

	cam_io_w_mb(1, soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_top_irq_clear_addr);
@@ -1853,7 +1857,6 @@ static int cam_tfe_csid_reset_retain_sw_reg( 
		status = cam_io_r(soc_info->reg_map[0].mem_base +

			csid_reg->cmn_reg->csid_top_irq_status_addr);

		CAM_DBG(CAM_ISP, "Status reg %d", status);

		rc = 0;

	} else {

		CAM_DBG(CAM_ISP, "CSID:%d hw reset completed %d",

			csid_hw->hw_intf->hw_idx, rc);
@@ -2345,7 +2348,7 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data) 
	const struct cam_tfe_csid_reg_offset           *csid_reg;

	const struct cam_tfe_csid_csi2_rx_reg_offset   *csi2_reg;

	uint32_t                   irq_status[TFE_CSID_IRQ_REG_MAX];

	bool fatal_err_detected = false;

	bool fatal_err_detected = false, is_error_irq = false;

	uint32_t sof_irq_debug_en = 0;

	unsigned long flags;

	uint32_t i, val;
@@ -2402,14 +2405,6 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data) 
	cam_io_w_mb(1, soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_irq_cmd_addr);



	CAM_ERR_RATE_LIMIT(CAM_ISP,

		"CSID %d irq status 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x",

		csid_hw->hw_intf->hw_idx, irq_status[TFE_CSID_IRQ_REG_TOP],

		irq_status[TFE_CSID_IRQ_REG_RX],

		irq_status[TFE_CSID_IRQ_REG_IPP],

		irq_status[TFE_CSID_IRQ_REG_RDI0],

		irq_status[TFE_CSID_IRQ_REG_RDI1],

		irq_status[TFE_CSID_IRQ_REG_RDI2]);



	/* Software register reset complete*/

	if (irq_status[TFE_CSID_IRQ_REG_TOP])
@@ -2456,25 +2451,29 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data) 
			TFE_CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME)

			csid_hw->error_irq_count++;



		if (irq_status[TFE_CSID_IRQ_REG_RX] &

			TFE_CSID_CSI2_RX_ERROR_CRC)

			is_error_irq = true;



		if (irq_status[TFE_CSID_IRQ_REG_RX] &

			TFE_CSID_CSI2_RX_ERROR_ECC)

			is_error_irq = true;



		if (irq_status[TFE_CSID_IRQ_REG_RX] &

			TFE_CSID_CSI2_RX_ERROR_MMAPPED_VC_DT)

			is_error_irq = true;

	}

	spin_unlock_irqrestore(&csid_hw->spin_lock, flags);



	if (csid_hw->error_irq_count || fatal_err_detected)

		is_error_irq = true;



	if (csid_hw->error_irq_count >

		CAM_TFE_CSID_MAX_IRQ_ERROR_COUNT) {

		fatal_err_detected = true;

		csid_hw->error_irq_count = 0;

	}



	CAM_INFO(CAM_ISP,

		"CSID %d irq status 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x",

		csid_hw->hw_intf->hw_idx,

		irq_status[TFE_CSID_IRQ_REG_TOP],

		irq_status[TFE_CSID_IRQ_REG_RX],

		irq_status[TFE_CSID_IRQ_REG_IPP],

		irq_status[TFE_CSID_IRQ_REG_RDI0],

		irq_status[TFE_CSID_IRQ_REG_RDI1],

		irq_status[TFE_CSID_IRQ_REG_RDI2]);



	if (fatal_err_detected) {

		/* Reset the Rx CFG registers */

		cam_io_w_mb(0, soc_info->reg_map[0].mem_base +
@@ -2590,6 +2589,23 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data) 
			(val >> 22), ((val >> 16) & 0x1F), (val & 0xFFFF));

	}



	if (csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_RST_IRQ_LOG) {



		if (irq_status[TFE_CSID_IRQ_REG_IPP] &

			BIT(csid_reg->cmn_reg->path_rst_done_shift_val))

			CAM_INFO_RATE_LIMIT(CAM_ISP,

				"CSID IPP reset complete");



		if (irq_status[TFE_CSID_IRQ_REG_TOP])

			CAM_INFO_RATE_LIMIT(CAM_ISP,

				"CSID TOP reset complete");



		if (irq_status[TFE_CSID_IRQ_REG_RX] &

			BIT(csid_reg->csi2_reg->csi2_rst_done_shift_val))

			CAM_INFO_RATE_LIMIT(CAM_ISP,

				"CSID RX reset complete");

	}



	/* read the IPP errors */

	if (csid_hw->pxl_pipe_enable) {

		/* IPP reset done bit */
@@ -2621,10 +2637,24 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data) 
			cam_io_w_mb(CAM_TFE_CSID_HALT_IMMEDIATELY,

				soc_info->reg_map[0].mem_base +

				csid_reg->ipp_reg->csid_pxl_ctrl_addr);

			is_error_irq = true;

		}



		if (irq_status[TFE_CSID_IRQ_REG_IPP] &

			TFE_CSID_PATH_IPP_ERROR_CCIF_VIOLATION)

			is_error_irq = true;



	}



	for (i = 0; i < csid_reg->cmn_reg->num_rdis; i++) {



		if ((irq_status[i] &

			BIT(csid_reg->cmn_reg->path_rst_done_shift_val)) &&

			(csid_hw->csid_debug &

			TFE_CSID_DEBUG_ENABLE_RST_IRQ_LOG))

			CAM_INFO_RATE_LIMIT(CAM_ISP,

				"CSID RDI%d reset complete", i);



		if (irq_status[i] &

			BIT(csid_reg->cmn_reg->path_rst_done_shift_val)) {

			CAM_DBG(CAM_ISP, "CSID RDI%d reset complete", i);
@@ -2647,12 +2677,29 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data) 


		if (irq_status[i] & TFE_CSID_PATH_ERROR_FIFO_OVERFLOW) {

			/* Stop RDI path immediately */

			is_error_irq = true;

			cam_io_w_mb(CAM_TFE_CSID_HALT_IMMEDIATELY,

				soc_info->reg_map[0].mem_base +

				csid_reg->rdi_reg[i]->csid_rdi_ctrl_addr);

		}



		if ((irq_status[i] & TFE_CSID_PATH_RDI_OVERFLOW_IRQ) ||

			(irq_status[i] &

				 TFE_CSID_PATH_RDI_ERROR_CCIF_VIOLATION))

			is_error_irq = true;

	}



	if (is_error_irq)

		CAM_ERR_RATE_LIMIT(CAM_ISP,

			"CSID %d irq status TOP: 0x%x RX: 0x%x IPP: 0x%x RDI0: 0x%x RDI1: 0x%x RDI2: 0x%x",

			csid_hw->hw_intf->hw_idx,

			irq_status[TFE_CSID_IRQ_REG_TOP],

			irq_status[TFE_CSID_IRQ_REG_RX],

			irq_status[TFE_CSID_IRQ_REG_IPP],

			irq_status[TFE_CSID_IRQ_REG_RDI0],

			irq_status[TFE_CSID_IRQ_REG_RDI1],

			irq_status[TFE_CSID_IRQ_REG_RDI2]);



	if (csid_hw->irq_debug_cnt >= CAM_TFE_CSID_IRQ_SOF_DEBUG_CNT_MAX) {

		cam_tfe_csid_sof_irq_debug(csid_hw, &sof_irq_debug_en);

		csid_hw->irq_debug_cnt = 0;

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_csid_hw/cam_tfe_csid_core.h

+2 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 */



#ifndef _CAM_TFE_CSID_HW_H_
@@ -65,6 +65,7 @@ 
#define TFE_CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE        BIT(6)

#define TFE_CSID_DEBUG_ENABLE_HBI_VBI_INFO            BIT(7)

#define TFE_CSID_DEBUG_DISABLE_EARLY_EOF              BIT(8)

#define TFE_CSID_DEBUG_ENABLE_RST_IRQ_LOG             BIT(9)



/* enum cam_csid_path_halt_mode select the path halt mode control */

enum cam_tfe_csid_path_halt_mode {