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Commit 708ac4b8 authored by Leonid Yegoshin's avatar Leonid Yegoshin Committed by Ralf Baechle
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MIPS: Add support for the proAptiv cores 



The proAptiv Multiprocessing System is a power efficient multi-core
microprocessor for use in system-on-chip (SoC) applications.
The proAptiv Multiprocessing System combines a deep pipeline
with multi-issue out of order execution for improved computational
throughput. The proAptiv Multiprocessing System can contain one to
six MIPS32r3 proAptiv cores, system level coherence
manager with L2 cache, optional coherent I/O port, and optional
floating point unit.

Signed-off-by: default avatarLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6134/
parent 76f59e32

arch/mips/include/asm/cpu-type.h

+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ static inline int __pure __get_cpu_type(const int cpu_type) 
	case CPU_74K:

	case CPU_M14KC:

	case CPU_M14KEC:

	case CPU_PROAPTIV:

#endif



#ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1

arch/mips/include/asm/cpu.h

+1 −1
Original line number Diff line number Diff line
@@ -293,7 +293,7 @@ enum cpu_type_enum { 
	CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,

	CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,

	CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC,

	CPU_M14KEC,

	CPU_M14KEC, CPU_PROAPTIV,



	/*

	 * MIPS64 class processors

arch/mips/kernel/idle.c

+1 −0
Original line number Diff line number Diff line
@@ -184,6 +184,7 @@ void __init check_wait(void) 
	case CPU_24K:

	case CPU_34K:

	case CPU_1004K:

	case CPU_PROAPTIV:

		cpu_wait = r4k_wait;

		if (read_c0_config7() & MIPS_CONF7_WII)

			cpu_wait = r4k_wait_irqoff;

arch/mips/kernel/spram.c

+1 −0
Original line number Diff line number Diff line
@@ -206,6 +206,7 @@ void spram_config(void) 
	case CPU_34K:

	case CPU_74K:

	case CPU_1004K:

	case CPU_PROAPTIV:

		config0 = read_c0_config();

		/* FIXME: addresses are Malta specific */

		if (config0 & (1<<24)) {

arch/mips/kernel/traps.c

+1 −0
Original line number Diff line number Diff line
@@ -1336,6 +1336,7 @@ static inline void parity_protection_init(void) 
	case CPU_34K:

	case CPU_74K:

	case CPU_1004K:

	case CPU_PROAPTIV:

		{

#define ERRCTL_PE	0x80000000

#define ERRCTL_L2P	0x00800000