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Commit 6fc4d1eb authored by Scott Wood's avatar Scott Wood Committed by Avi Kivity
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KVM: PPC: e500: Disable preloading TLB1 in tlb_load(). 



Since TLB1 loading doesn't check the shadow TLB before allocating another
entry, you can get duplicates.

Once shadow PIDs are enabled in a later patch, we won't need to
invalidate the TLB on every switch, so this optimization won't be
needed anyway.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 4cd35f67

arch/powerpc/kvm/e500_tlb.c

+0 −18
Original line number Diff line number Diff line
@@ -144,24 +144,6 @@ static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500, 


void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)

{

	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);

	int i;

	unsigned register mas0;



	/* Load all valid TLB1 entries to reduce guest tlb miss fault */

	local_irq_disable();

	mas0 = mfspr(SPRN_MAS0);

	for (i = 0; i < tlb1_max_shadow_size(); i++) {

		struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];



		if (get_tlb_v(stlbe)) {

			mtspr(SPRN_MAS0, MAS0_TLBSEL(1)

					| MAS0_ESEL(to_htlb1_esel(i)));

			__write_host_tlbe(stlbe);

		}

	}

	mtspr(SPRN_MAS0, mas0);

	local_irq_enable();

}



void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)