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Commit 6f540db7 authored by Bhuvanchandra DV's avatar Bhuvanchandra DV Committed by Shawn Guo
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ARM: imx: clk-vf610: Add clock for UART4 and UART5 



Add support for clock gating of UART4 and UART5.
We use these UART's in a (not yet mainlined)
device tree.

Signed-off-by: default avatarBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent c8aeb7df

arch/arm/mach-imx/clk-vf610.c

+2 −0
Original line number Diff line number Diff line
@@ -267,6 +267,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node) 
	clk[VF610_CLK_UART1] = imx_clk_gate2("uart1", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(8));

	clk[VF610_CLK_UART2] = imx_clk_gate2("uart2", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(9));

	clk[VF610_CLK_UART3] = imx_clk_gate2("uart3", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(10));

	clk[VF610_CLK_UART4] = imx_clk_gate2("uart4", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(9));

	clk[VF610_CLK_UART5] = imx_clk_gate2("uart5", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(10));



	clk[VF610_CLK_I2C0] = imx_clk_gate2("i2c0", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(6));

	clk[VF610_CLK_I2C1] = imx_clk_gate2("i2c1", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(7));