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Commit 6ed6bf47 authored by Dinh Nguyen's avatar Dinh Nguyen
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ARM: dts: socfpga: fpga manager data is 32 bits



Adjust regs property for the FPGA manager data register to
properly reflect that it is a single 32 bit register.

Signed-off-by: default avatarDalon Westergreen <dwesterg@altera.com>
Signed-off-by: default avatarAlan Tull <atull@opensource.altera.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent f549af06
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+1 −1
Original line number Diff line number Diff line
@@ -516,7 +516,7 @@
		fpgamgr0: fpgamgr@ff706000 {
			compatible = "altr,socfpga-fpga-mgr";
			reg = <0xff706000 0x1000
			       0xffb90000 0x1000>;
			       0xffb90000 0x4>;
			interrupts = <0 175 4>;
		};