Loading drivers/block/loop.c +12 −3 Original line number Diff line number Diff line Loading @@ -1083,8 +1083,6 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, mapping = file->f_mapping; inode = mapping->host; size = get_loop_size(lo, file); if ((config->info.lo_flags & ~LOOP_CONFIGURE_SETTABLE_FLAGS) != 0) { error = -EINVAL; goto out_unlock; Loading Loading @@ -1133,8 +1131,11 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, blk_queue_physical_block_size(lo->lo_queue, bsize); blk_queue_io_min(lo->lo_queue, bsize); loop_config_discard(lo); loop_update_dio(lo); loop_sysfs_init(lo); size = get_loop_size(lo, file); loop_set_size(lo, size); set_blocksize(bdev, S_ISBLK(inode->i_mode) ? Loading @@ -1144,6 +1145,8 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, if (part_shift) lo->lo_flags |= LO_FLAGS_PARTSCAN; partscan = lo->lo_flags & LO_FLAGS_PARTSCAN; if (partscan) lo->lo_disk->flags &= ~GENHD_FL_NO_PART_SCAN; /* Grab the block_device to prevent its destruction after we * put /dev/loopXX inode. Later in __loop_clr_fd() we bdput(bdev). Loading Loading @@ -1410,6 +1413,11 @@ loop_get_status(struct loop_device *lo, struct loop_info64 *info) info->lo_number = lo->lo_number; info->lo_offset = lo->lo_offset; info->lo_sizelimit = lo->lo_sizelimit; /* loff_t vars have been assigned __u64 */ if (lo->lo_offset < 0 || lo->lo_sizelimit < 0) return -EOVERFLOW; info->lo_flags = lo->lo_flags; memcpy(info->lo_file_name, lo->lo_file_name, LO_NAME_SIZE); memcpy(info->lo_crypt_name, lo->lo_crypt_name, LO_NAME_SIZE); Loading Loading @@ -2070,7 +2078,8 @@ static int loop_add(struct loop_device **l, int i) lo->tag_set.queue_depth = 128; lo->tag_set.numa_node = NUMA_NO_NODE; lo->tag_set.cmd_size = sizeof(struct loop_cmd); lo->tag_set.flags = BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_SG_MERGE; lo->tag_set.flags = BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_SG_MERGE | BLK_MQ_F_NO_SCHED; lo->tag_set.driver_data = lo; err = blk_mq_alloc_tag_set(&lo->tag_set); Loading drivers/gpu/msm/kgsl.c +6 −0 Original line number Diff line number Diff line Loading @@ -300,6 +300,9 @@ static void kgsl_destroy_ion(struct kgsl_memdesc *memdesc) struct kgsl_mem_entry, memdesc); struct kgsl_dma_buf_meta *meta = entry->priv_data; if (memdesc->priv & KGSL_MEMDESC_MAPPED) return; if (meta != NULL) { remove_dmabuf_list(meta); dma_buf_unmap_attachment(meta->attach, meta->table, Loading Loading @@ -328,6 +331,9 @@ static void kgsl_destroy_anon(struct kgsl_memdesc *memdesc) struct scatterlist *sg; struct page *page; if (memdesc->priv & KGSL_MEMDESC_MAPPED) return; for_each_sg(memdesc->sgt->sgl, sg, memdesc->sgt->nents, i) { page = sg_page(sg); for (j = 0; j < (sg->length >> PAGE_SHIFT); j++) { Loading drivers/gpu/msm/kgsl_drawobj.c +9 −2 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved. */ /* Loading Loading @@ -508,6 +508,8 @@ static int drawobj_add_sync_timeline(struct kgsl_device *device, /* Set pending flag before adding callback to avoid race */ set_bit(event->id, &syncobj->pending); /* Get a dma_fence refcount to hand over to the callback */ dma_fence_get(event->fence); ret = dma_fence_add_callback(event->fence, &event->cb, drawobj_sync_timeline_fence_callback); Loading @@ -520,10 +522,15 @@ static int drawobj_add_sync_timeline(struct kgsl_device *device, ret = 0; } /* Put the refcount from fence creation */ dma_fence_put(event->fence); kgsl_drawobj_put(drawobj); return ret; } return ret; /* Put the refcount from fence creation */ dma_fence_put(event->fence); return 0; } static int drawobj_add_sync_fence(struct kgsl_device *device, Loading drivers/media/platform/qcom/venus/hfi_parser.c +4 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,10 @@ static void init_codecs(struct venus_core *core) struct venus_caps *caps = core->caps, *cap; unsigned long bit; if (hweight_long(core->dec_codecs) + hweight_long(core->enc_codecs) > MAX_CODEC_NUM) return; for_each_set_bit(bit, &core->dec_codecs, MAX_CODEC_NUM) { cap = &caps[core->codecs_count++]; cap->codec = BIT(bit); Loading drivers/mmc/host/sdhci-msm.c +42 −21 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * drivers/mmc/host/sdhci-msm.c - Qualcomm Technologies, Inc. MSM SDHCI Platform * driver source file Loading Loading @@ -5042,6 +5042,44 @@ static int sdhci_msm_notify_load(struct sdhci_host *host, enum mmc_load state) return 0; } static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = pltfm_host->priv; struct reset_control *reset = msm_host->core_reset; int ret = -EOPNOTSUPP; if (!reset) { dev_err(dev, "unable to acquire core_reset\n"); goto out; } ret = reset_control_assert(reset); if (ret) { dev_err(dev, "core_reset assert failed %d\n", ret); goto out; } /* * The hardware requirement for delay between assert/deassert * is at least 3-4 sleep clock (32.7KHz) cycles, which comes to * ~125us (4/32768). To be on the safe side add 200us delay. */ usleep_range(200, 210); ret = reset_control_deassert(reset); if (ret) { dev_err(dev, "core_reset deassert failed %d\n", ret); goto out; } usleep_range(200, 210); out: return ret; } static void sdhci_msm_hw_reset(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); Loading @@ -5063,28 +5101,10 @@ static void sdhci_msm_hw_reset(struct sdhci_host *host) host->mmc->cqe_enabled = false; } ret = reset_control_assert(msm_host->core_reset); if (ret) { dev_err(&pdev->dev, "%s: core_reset assert failed, err = %d\n", __func__, ret); goto out; } /* * The hardware requirement for delay between assert/deassert * is at least 3-4 sleep clock (32.7KHz) cycles, which comes to * ~125us (4/32768). To be on the safe side add 200us delay. */ usleep_range(200, 210); ret = reset_control_deassert(msm_host->core_reset); if (ret) dev_err(&pdev->dev, "%s: core_reset deassert failed, err = %d\n", __func__, ret); sdhci_msm_gcc_reset(&pdev->dev, host); sdhci_msm_registers_restore(host); msm_host->reg_store = false; out: return; } Loading Loading @@ -5411,6 +5431,7 @@ static int sdhci_msm_probe(struct platform_device *pdev) goto pltfm_free; } sdhci_msm_gcc_reset(&pdev->dev, host); /* Setup Clocks */ /* Setup SDCC bus voter clock. */ Loading Loading
drivers/block/loop.c +12 −3 Original line number Diff line number Diff line Loading @@ -1083,8 +1083,6 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, mapping = file->f_mapping; inode = mapping->host; size = get_loop_size(lo, file); if ((config->info.lo_flags & ~LOOP_CONFIGURE_SETTABLE_FLAGS) != 0) { error = -EINVAL; goto out_unlock; Loading Loading @@ -1133,8 +1131,11 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, blk_queue_physical_block_size(lo->lo_queue, bsize); blk_queue_io_min(lo->lo_queue, bsize); loop_config_discard(lo); loop_update_dio(lo); loop_sysfs_init(lo); size = get_loop_size(lo, file); loop_set_size(lo, size); set_blocksize(bdev, S_ISBLK(inode->i_mode) ? Loading @@ -1144,6 +1145,8 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, if (part_shift) lo->lo_flags |= LO_FLAGS_PARTSCAN; partscan = lo->lo_flags & LO_FLAGS_PARTSCAN; if (partscan) lo->lo_disk->flags &= ~GENHD_FL_NO_PART_SCAN; /* Grab the block_device to prevent its destruction after we * put /dev/loopXX inode. Later in __loop_clr_fd() we bdput(bdev). Loading Loading @@ -1410,6 +1413,11 @@ loop_get_status(struct loop_device *lo, struct loop_info64 *info) info->lo_number = lo->lo_number; info->lo_offset = lo->lo_offset; info->lo_sizelimit = lo->lo_sizelimit; /* loff_t vars have been assigned __u64 */ if (lo->lo_offset < 0 || lo->lo_sizelimit < 0) return -EOVERFLOW; info->lo_flags = lo->lo_flags; memcpy(info->lo_file_name, lo->lo_file_name, LO_NAME_SIZE); memcpy(info->lo_crypt_name, lo->lo_crypt_name, LO_NAME_SIZE); Loading Loading @@ -2070,7 +2078,8 @@ static int loop_add(struct loop_device **l, int i) lo->tag_set.queue_depth = 128; lo->tag_set.numa_node = NUMA_NO_NODE; lo->tag_set.cmd_size = sizeof(struct loop_cmd); lo->tag_set.flags = BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_SG_MERGE; lo->tag_set.flags = BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_SG_MERGE | BLK_MQ_F_NO_SCHED; lo->tag_set.driver_data = lo; err = blk_mq_alloc_tag_set(&lo->tag_set); Loading
drivers/gpu/msm/kgsl.c +6 −0 Original line number Diff line number Diff line Loading @@ -300,6 +300,9 @@ static void kgsl_destroy_ion(struct kgsl_memdesc *memdesc) struct kgsl_mem_entry, memdesc); struct kgsl_dma_buf_meta *meta = entry->priv_data; if (memdesc->priv & KGSL_MEMDESC_MAPPED) return; if (meta != NULL) { remove_dmabuf_list(meta); dma_buf_unmap_attachment(meta->attach, meta->table, Loading Loading @@ -328,6 +331,9 @@ static void kgsl_destroy_anon(struct kgsl_memdesc *memdesc) struct scatterlist *sg; struct page *page; if (memdesc->priv & KGSL_MEMDESC_MAPPED) return; for_each_sg(memdesc->sgt->sgl, sg, memdesc->sgt->nents, i) { page = sg_page(sg); for (j = 0; j < (sg->length >> PAGE_SHIFT); j++) { Loading
drivers/gpu/msm/kgsl_drawobj.c +9 −2 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved. */ /* Loading Loading @@ -508,6 +508,8 @@ static int drawobj_add_sync_timeline(struct kgsl_device *device, /* Set pending flag before adding callback to avoid race */ set_bit(event->id, &syncobj->pending); /* Get a dma_fence refcount to hand over to the callback */ dma_fence_get(event->fence); ret = dma_fence_add_callback(event->fence, &event->cb, drawobj_sync_timeline_fence_callback); Loading @@ -520,10 +522,15 @@ static int drawobj_add_sync_timeline(struct kgsl_device *device, ret = 0; } /* Put the refcount from fence creation */ dma_fence_put(event->fence); kgsl_drawobj_put(drawobj); return ret; } return ret; /* Put the refcount from fence creation */ dma_fence_put(event->fence); return 0; } static int drawobj_add_sync_fence(struct kgsl_device *device, Loading
drivers/media/platform/qcom/venus/hfi_parser.c +4 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,10 @@ static void init_codecs(struct venus_core *core) struct venus_caps *caps = core->caps, *cap; unsigned long bit; if (hweight_long(core->dec_codecs) + hweight_long(core->enc_codecs) > MAX_CODEC_NUM) return; for_each_set_bit(bit, &core->dec_codecs, MAX_CODEC_NUM) { cap = &caps[core->codecs_count++]; cap->codec = BIT(bit); Loading
drivers/mmc/host/sdhci-msm.c +42 −21 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * drivers/mmc/host/sdhci-msm.c - Qualcomm Technologies, Inc. MSM SDHCI Platform * driver source file Loading Loading @@ -5042,6 +5042,44 @@ static int sdhci_msm_notify_load(struct sdhci_host *host, enum mmc_load state) return 0; } static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = pltfm_host->priv; struct reset_control *reset = msm_host->core_reset; int ret = -EOPNOTSUPP; if (!reset) { dev_err(dev, "unable to acquire core_reset\n"); goto out; } ret = reset_control_assert(reset); if (ret) { dev_err(dev, "core_reset assert failed %d\n", ret); goto out; } /* * The hardware requirement for delay between assert/deassert * is at least 3-4 sleep clock (32.7KHz) cycles, which comes to * ~125us (4/32768). To be on the safe side add 200us delay. */ usleep_range(200, 210); ret = reset_control_deassert(reset); if (ret) { dev_err(dev, "core_reset deassert failed %d\n", ret); goto out; } usleep_range(200, 210); out: return ret; } static void sdhci_msm_hw_reset(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); Loading @@ -5063,28 +5101,10 @@ static void sdhci_msm_hw_reset(struct sdhci_host *host) host->mmc->cqe_enabled = false; } ret = reset_control_assert(msm_host->core_reset); if (ret) { dev_err(&pdev->dev, "%s: core_reset assert failed, err = %d\n", __func__, ret); goto out; } /* * The hardware requirement for delay between assert/deassert * is at least 3-4 sleep clock (32.7KHz) cycles, which comes to * ~125us (4/32768). To be on the safe side add 200us delay. */ usleep_range(200, 210); ret = reset_control_deassert(msm_host->core_reset); if (ret) dev_err(&pdev->dev, "%s: core_reset deassert failed, err = %d\n", __func__, ret); sdhci_msm_gcc_reset(&pdev->dev, host); sdhci_msm_registers_restore(host); msm_host->reg_store = false; out: return; } Loading Loading @@ -5411,6 +5431,7 @@ static int sdhci_msm_probe(struct platform_device *pdev) goto pltfm_free; } sdhci_msm_gcc_reset(&pdev->dev, host); /* Setup Clocks */ /* Setup SDCC bus voter clock. */ Loading