Commit 6d7e05ab authored Mar 21, 2017 by Shawn Guo Committed by Shawn Guo Mar 24, 2017

arm64: dts: zte: remove zx296718 pll_vga clock



Rather than a fixed rate clock, pll_vga is a PLL can be programmed into
different freqencies.  Let's drop it from device tree and get it
registered from clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

parent c1ae3cfa

arch/arm64/boot/dts/zte/zx296718.dtsi

+0 −7

Original line number	Diff line number	Diff line
		@@ -235,13 +235,6 @@
		clock-output-names = "pll_mac";
		};

		pll_vga: clk-pll-1073m {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <1073000000>;
		clock-output-names = "pll_vga";
		};

		pll_mm0: clk-pll-1188m {
		compatible = "fixed-clock";
		#clock-cells = <0>;