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Commit 6d7b42a4 authored by Jean-Christophe PLAGNIOL-VILLARD's avatar Jean-Christophe PLAGNIOL-VILLARD Committed by Artem Bityutskiy
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mtd: fsmc_nand: pass the ale and cmd resource via resource 



Do not use the platform_data to pass resource and be smart in the drivers.
Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Signed-off-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-By: default avatarVipin Kumar <vipin.kumar@st.com>
Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
parent fc05d5a3

Documentation/devicetree/bindings/mtd/fsmc-nand.txt

+5 −7
Original line number Diff line number Diff line
@@ -3,9 +3,7 @@ 
Required properties:

- compatible : "st,spear600-fsmc-nand"

- reg : Address range of the mtd chip

- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"

- st,ale-off : Chip specific offset to ALE

- st,cle-off : Chip specific offset to CLE

- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"



Optional properties:

- bank-width : Width (in bytes) of the device.  If not present, the width
@@ -19,10 +17,10 @@ Example: 
		#address-cells = <1>;

		#size-cells = <1>;

		reg = <0xd1800000 0x1000	/* FSMC Register */

		       0xd2000000 0x4000>;	/* NAND Base */

		reg-names = "fsmc_regs", "nand_data";

		st,ale-off = <0x20000>;

		st,cle-off = <0x10000>;

		       0xd2000000 0x0010	/* NAND Base DATA */

		       0xd2020000 0x0010	/* NAND Base ADDR */

		       0xd2010000 0x0010>;	/* NAND Base CMD */

		reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";



		bank-width = <1>;

		nand-skip-bbtscan;

arch/arm/boot/dts/spear13xx.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -105,14 +105,14 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0xb0000000 0x1000	/* FSMC Register*/

			       0xb0800000 0x0010>;	/* NAND Base */

			reg-names = "fsmc_regs", "nand_data";

			       0xb0800000 0x0010	/* NAND Base DATA */

			       0xb0820000 0x0010	/* NAND Base ADDR */

			       0xb0810000 0x0010>;	/* NAND Base CMD */

			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";

			interrupts = <0 20 0x4

				      0 21 0x4

				      0 22 0x4

				      0 23 0x4>;

			st,ale-off = <0x20000>;

			st,cle-off = <0x10000>;

			status = "disabled";

		};

arch/arm/boot/dts/spear300.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -38,10 +38,10 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0x94000000 0x1000	/* FSMC Register */

			       0x80000000 0x0010>;	/* NAND Base */

			reg-names = "fsmc_regs", "nand_data";

			st,ale-off = <0x20000>;

			st,cle-off = <0x10000>;

			       0x80000000 0x0010	/* NAND Base DATA */

			       0x80020000 0x0010	/* NAND Base ADDR */

			       0x80010000 0x0010>;	/* NAND Base CMD */

			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";

			status = "disabled";

		};

arch/arm/boot/dts/spear310.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -32,10 +32,10 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0x44000000 0x1000	/* FSMC Register */

			       0x40000000 0x0010>;	/* NAND Base */

			reg-names = "fsmc_regs", "nand_data";

			st,ale-off = <0x10000>;

			st,cle-off = <0x20000>;

			       0x40000000 0x0010	/* NAND Base DATA */

			       0x40020000 0x0010	/* NAND Base ADDR */

			       0x40010000 0x0010>;	/* NAND Base CMD */

			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";

			status = "disabled";

		};

arch/arm/boot/dts/spear320.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -38,10 +38,10 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0x4c000000 0x1000	/* FSMC Register */

			       0x50000000 0x0010>;	/* NAND Base */

			reg-names = "fsmc_regs", "nand_data";

			st,ale-off = <0x20000>;

			st,cle-off = <0x10000>;

			       0x50000000 0x0010	/* NAND Base DATA */

			       0x50020000 0x0010	/* NAND Base ADDR */

			       0x50010000 0x0010>;	/* NAND Base CMD */

			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";

			status = "disabled";

		};