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Commit 6cfd7775 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next 

A few more misc things for radeon and amdgpu for 4.5:
- TTM fixes for imported buffers
- amdgpu fixes to avoid -ENOMEM in CS ioctl
- CZ UVD and VCE clock force options for debugging video issues
- A couple of ACP prerequisites
- Misc fixes

* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: validate duplicates first
  drm/amdgpu: move VM page tables to the LRU end on CS v2
  drm/ttm: add ttm_bo_move_to_lru_tail function v2
  drm/ttm: fix adding foreign BOs to the swap LRU
  drm/ttm: fix adding foreign BOs to the LRU during init v2
  drm/radeon: use kobj_to_dev()
  drm/amdgpu: use kobj_to_dev()
  drm/amdgpu/cz: force vce clocks when sclks are forced
  drm/amdgpu/cz: force uvd clocks when sclks are forced
  drm/amdgpu/cz: add code to enable forcing VCE clocks
  drm/amdgpu/cz: add code to enable forcing UVD clocks
  drm/amdgpu: fix lost sync_to if scheduler is enabled.
  drm/amd/powerplay: fix static checker warning for return meaningless value.
  drm/amdgpu: add irq domain support
  drm/amdgpu/cgs: add an interface to access PCI resources
parents 8a0d560f d8e0cae6

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −0
Original line number Diff line number Diff line
@@ -987,6 +987,8 @@ void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm, 
			 struct list_head *validated,

			 struct amdgpu_bo_list_entry *entry);

void amdgpu_vm_get_pt_bos(struct amdgpu_vm *vm, struct list_head *duplicates);

void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,

				  struct amdgpu_vm *vm);

int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,

		      struct amdgpu_sync *sync);

void amdgpu_vm_flush(struct amdgpu_ring *ring,

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+36 −0
Original line number Diff line number Diff line
@@ -398,6 +398,41 @@ static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr, 
	WARN(ret, "pci_write_config_dword error");

}





static int amdgpu_cgs_get_pci_resource(void *cgs_device,

				       enum cgs_resource_type resource_type,

				       uint64_t size,

				       uint64_t offset,

				       uint64_t *resource_base)

{

	CGS_FUNC_ADEV;



	if (resource_base == NULL)

		return -EINVAL;



	switch (resource_type) {

	case CGS_RESOURCE_TYPE_MMIO:

		if (adev->rmmio_size == 0)

			return -ENOENT;

		if ((offset + size) > adev->rmmio_size)

			return -EINVAL;

		*resource_base = adev->rmmio_base;

		return 0;

	case CGS_RESOURCE_TYPE_DOORBELL:

		if (adev->doorbell.size == 0)

			return -ENOENT;

		if ((offset + size) > adev->doorbell.size)

			return -EINVAL;

		*resource_base = adev->doorbell.base;

		return 0;

	case CGS_RESOURCE_TYPE_FB:

	case CGS_RESOURCE_TYPE_IO:

	case CGS_RESOURCE_TYPE_ROM:

	default:

		return -EINVAL;

	}

}



static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device,

						  unsigned table, uint16_t *size,

						  uint8_t *frev, uint8_t *crev)
@@ -1041,6 +1076,7 @@ static const struct cgs_ops amdgpu_cgs_ops = { 
	amdgpu_cgs_write_pci_config_byte,

	amdgpu_cgs_write_pci_config_word,

	amdgpu_cgs_write_pci_config_dword,

	amdgpu_cgs_get_pci_resource,

	amdgpu_cgs_atom_get_data_table,

	amdgpu_cgs_atom_get_cmd_table_revs,

	amdgpu_cgs_atom_exec_cmd_table,

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+8 −3
Original line number Diff line number Diff line
@@ -421,15 +421,17 @@ static int amdgpu_cs_parser_relocs(struct amdgpu_cs_parser *p) 


	amdgpu_vm_get_pt_bos(&fpriv->vm, &duplicates);



	r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &p->validated);

	r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &duplicates);

	if (r)

		goto error_validate;



	r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &duplicates);

	r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &p->validated);



error_validate:

	if (r)

	if (r) {

		amdgpu_vm_move_pt_bos_in_lru(p->adev, &fpriv->vm);

		ttm_eu_backoff_reservation(&p->ticket, &p->validated);

	}



error_reserve:

	if (need_mmap_lock)
@@ -473,8 +475,11 @@ static int cmp_size_smaller_first(void *priv, struct list_head *a, 
 **/

static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error, bool backoff)

{

	struct amdgpu_fpriv *fpriv = parser->filp->driver_priv;

	unsigned i;



	amdgpu_vm_move_pt_bos_in_lru(parser->adev, &fpriv->vm);



	if (!error) {

		/* Sort the buffer list from the smallest to largest buffer,

		 * which affects the order of buffers in the LRU list.

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

+100 −8
Original line number Diff line number Diff line
@@ -312,6 +312,7 @@ int amdgpu_irq_add_id(struct amdgpu_device *adev, unsigned src_id, 
	}



	adev->irq.sources[src_id] = source;



	return 0;

}
@@ -335,6 +336,9 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev, 
		return;

	}



	if (adev->irq.virq[src_id]) {

		generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));

	} else {

		src = adev->irq.sources[src_id];

		if (!src) {

			DRM_DEBUG("Unhandled interrupt src_id: %d\n", src_id);
@@ -345,6 +349,7 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev, 
		if (r)

			DRM_ERROR("error processing interrupt (%d)\n", r);

	}

}



/**

 * amdgpu_irq_update - update hw interrupt state
@@ -461,3 +466,90 @@ bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src, 


	return !!atomic_read(&src->enabled_types[type]);

}



/* gen irq */

static void amdgpu_irq_mask(struct irq_data *irqd)

{

	/* XXX */

}



static void amdgpu_irq_unmask(struct irq_data *irqd)

{

	/* XXX */

}



static struct irq_chip amdgpu_irq_chip = {

	.name = "amdgpu-ih",

	.irq_mask = amdgpu_irq_mask,

	.irq_unmask = amdgpu_irq_unmask,

};



static int amdgpu_irqdomain_map(struct irq_domain *d,

				unsigned int irq, irq_hw_number_t hwirq)

{

	if (hwirq >= AMDGPU_MAX_IRQ_SRC_ID)

		return -EPERM;



	irq_set_chip_and_handler(irq,

				 &amdgpu_irq_chip, handle_simple_irq);

	return 0;

}



static struct irq_domain_ops amdgpu_hw_irqdomain_ops = {

	.map = amdgpu_irqdomain_map,

};



/**

 * amdgpu_irq_add_domain - create a linear irq domain

 *

 * @adev: amdgpu device pointer

 *

 * Create an irq domain for GPU interrupt sources

 * that may be driven by another driver (e.g., ACP).

 */

int amdgpu_irq_add_domain(struct amdgpu_device *adev)

{

	adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,

						 &amdgpu_hw_irqdomain_ops, adev);

	if (!adev->irq.domain) {

		DRM_ERROR("GPU irq add domain failed\n");

		return -ENODEV;

	}



	return 0;

}



/**

 * amdgpu_irq_remove_domain - remove the irq domain

 *

 * @adev: amdgpu device pointer

 *

 * Remove the irq domain for GPU interrupt sources

 * that may be driven by another driver (e.g., ACP).

 */

void amdgpu_irq_remove_domain(struct amdgpu_device *adev)

{

	if (adev->irq.domain) {

		irq_domain_remove(adev->irq.domain);

		adev->irq.domain = NULL;

	}

}



/**

 * amdgpu_irq_create_mapping - create a mapping between a domain irq and a

 *                             Linux irq

 *

 * @adev: amdgpu device pointer

 * @src_id: IH source id

 *

 * Create a mapping between a domain irq (GPU IH src id) and a Linux irq

 * Use this for components that generate a GPU interrupt, but are driven

 * by a different driver (e.g., ACP).

 * Returns the Linux irq.

 */

unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id)

{

	adev->irq.virq[src_id] = irq_create_mapping(adev->irq.domain, src_id);



	return adev->irq.virq[src_id];

}

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h

+9 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#ifndef __AMDGPU_IRQ_H__

#define __AMDGPU_IRQ_H__



#include <linux/irqdomain.h>

#include "amdgpu_ih.h"



#define AMDGPU_MAX_IRQ_SRC_ID	0x100
@@ -65,6 +66,10 @@ struct amdgpu_irq { 
	/* interrupt ring */

	struct amdgpu_ih_ring		ih;

	const struct amdgpu_ih_funcs	*ih_funcs;



	/* gen irq stuff */

	struct irq_domain		*domain; /* GPU irq controller domain */

	unsigned			virq[AMDGPU_MAX_IRQ_SRC_ID];

};



void amdgpu_irq_preinstall(struct drm_device *dev);
@@ -90,4 +95,8 @@ int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, 
bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,

			unsigned type);



int amdgpu_irq_add_domain(struct amdgpu_device *adev);

void amdgpu_irq_remove_domain(struct amdgpu_device *adev);

unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id);



#endif