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Commit 6cd8eaac authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'uniphier-dt64-v4.12' of... 

Merge tag 'uniphier-dt64-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64

Pull "UniPhier ARM64 SoC DT updates for v4.12" from Masahiro Yamada:

- Fix W=* build warnings
- Add pinctrl properties to eMMC nodes
- Fix resets properties of USB nodes

* tag 'uniphier-dt64-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: re-order reset deassertion of USB of LD11
  arm64: dts: uniphier: add pinctrl property to eMMC node for LD11/LD20
  arm64: dts: uniphier: move memory node below aliases node
  arm64: dts: uniphier: fix no unit name warnings
parents 517b311e 7a201e31

arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts

+5 −5
Original line number Diff line number Diff line
@@ -52,11 +52,6 @@ 
	model = "UniPhier LD11 Reference Board";

	compatible = "socionext,uniphier-ld11-ref", "socionext,uniphier-ld11";



	memory {

		device_type = "memory";

		reg = <0 0x80000000 0 0x40000000>;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};
@@ -73,6 +68,11 @@ 
		i2c4 = &i2c4;

		i2c5 = &i2c5;

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0 0x80000000 0 0x40000000>;

	};

};



&ethsc {

arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

+9 −4
Original line number Diff line number Diff line
@@ -140,7 +140,7 @@ 
			     <1 10 4>;

	};



	soc {

	soc@0 {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;
@@ -304,6 +304,8 @@ 
			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";

			reg = <0x5a000000 0x400>;

			interrupts = <0 78 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_emmc>;

			clocks = <&sys_clk 4>;

			bus-width = <8>;

			mmc-ddr-1_8v;
@@ -318,7 +320,8 @@ 
			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_usb0>;

			clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;

			resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>;

			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,

				 <&mio_rst 12>;

		};



		usb1: usb@5a810100 {
@@ -329,7 +332,8 @@ 
			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_usb1>;

			clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;

			resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>;

			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,

				 <&mio_rst 13>;

		};



		usb2: usb@5a820100 {
@@ -340,7 +344,8 @@ 
			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_usb2>;

			clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;

			resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>;

			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,

				 <&mio_rst 14>;

		};



		mioctrl@5b3e0000 {

arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts

+5 −5
Original line number Diff line number Diff line
@@ -52,11 +52,6 @@ 
	model = "UniPhier LD20 Reference Board";

	compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20";



	memory {

		device_type = "memory";

		reg = <0 0x80000000 0 0xc0000000>;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};
@@ -73,6 +68,11 @@ 
		i2c4 = &i2c4;

		i2c5 = &i2c5;

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0 0x80000000 0 0xc0000000>;

	};

};



&ethsc {

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -209,7 +209,7 @@ 
			     <1 10 4>;

	};



	soc {

	soc@0 {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;
@@ -378,6 +378,8 @@ 
			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";

			reg = <0x5a000000 0x400>;

			interrupts = <0 78 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_emmc>;

			clocks = <&sys_clk 4>;

			bus-width = <8>;

			mmc-ddr-1_8v;