Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6c4ef788 authored by Linux Build Service Account's avatar Linux Build Service Account
Browse files

Merge a0e0de01 on remote branch

Change-Id: I921fd1f94f53062455451fa6b1aeeff1ba9fe676
parents 984639ec a0e0de01
Loading
Loading
Loading
Loading
+9 −7
Original line number Diff line number Diff line
@@ -2510,8 +2510,8 @@
			http://repo.or.cz/w/linux-2.6/mini2440.git

	mitigations=
			[X86,PPC,S390] Control optional mitigations for CPU
			vulnerabilities.  This is a set of curated,
			[X86,PPC,S390,ARM64] Control optional mitigations for
			CPU vulnerabilities.  This is a set of curated,
			arch-independent options, each of which is an
			aggregation of existing arch-specific options.

@@ -2520,12 +2520,14 @@
				improves system performance, but it may also
				expose users to several CPU vulnerabilities.
				Equivalent to: nopti [X86,PPC]
					       kpti=0 [ARM64]
					       nospectre_v1 [PPC]
					       nobp=0 [S390]
					       nospectre_v1 [X86]
					       nospectre_v2 [X86,PPC,S390]
					       nospectre_v2 [X86,PPC,S390,ARM64]
					       spectre_v2_user=off [X86]
					       spec_store_bypass_disable=off [X86,PPC]
					       ssbd=force-off [ARM64]
					       l1tf=off [X86]
					       mds=off [X86]

@@ -2873,10 +2875,10 @@
			(bounds check bypass). With this option data leaks
			are possible in the system.

	nospectre_v2	[X86,PPC_FSL_BOOK3E] Disable all mitigations for the Spectre variant 2
			(indirect branch prediction) vulnerability. System may
			allow data leaks with this option, which is equivalent
			to spectre_v2=off.
	nospectre_v2	[X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for
			the Spectre variant 2 (indirect branch prediction)
			vulnerability. System may allow data leaks with this
			option.

	nospec_store_bypass_disable
			[HW] Disable all mitigations for the Speculative Store Bypass vulnerability
+4 −0
Original line number Diff line number Diff line
@@ -178,3 +178,7 @@ HWCAP_ILRCPC
HWCAP_FLAGM

    Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.

HWCAP_SSBS

    Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.
+1 −1
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
VERSION = 4
PATCHLEVEL = 19
SUBLEVEL = 76
SUBLEVEL = 79
EXTRAVERSION =
NAME = "People's Front"

+3 −2
Original line number Diff line number Diff line
@@ -1586,8 +1586,9 @@ config ARM_PATCH_IDIV
	  code to do integer division.

config AEABI
	bool "Use the ARM EABI to compile the kernel" if !CPU_V7 && !CPU_V7M && !CPU_V6 && !CPU_V6K
	default CPU_V7 || CPU_V7M || CPU_V6 || CPU_V6K
	bool "Use the ARM EABI to compile the kernel" if !CPU_V7 && \
		!CPU_V7M && !CPU_V6 && !CPU_V6K && !CC_IS_CLANG
	default CPU_V7 || CPU_V7M || CPU_V6 || CPU_V6K || CC_IS_CLANG
	help
	  This option allows for the kernel to be compiled using the latest
	  ARM ABI (aka EABI).  This is only useful if you are using a user
+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ KBUILD_CFLAGS += $(call cc-option,-mno-unaligned-access)
endif

ifeq ($(CONFIG_FRAME_POINTER),y)
KBUILD_CFLAGS	+=-fno-omit-frame-pointer -mapcs -mno-sched-prolog
KBUILD_CFLAGS  +=-fno-omit-frame-pointer $(call cc-option,-mapcs,) $(call cc-option,-mno-sched-prolog,)
endif

ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)
Loading