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Commit 6c30c4ec authored by Michael Kelley's avatar Michael Kelley Committed by Greg Kroah-Hartman
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x86/ioremap: Fix page aligned size calculation in __ioremap_caller() 



[ Upstream commit 4dbd6a3e90e03130973688fd79e19425f720d999 ]

Current code re-calculates the size after aligning the starting and
ending physical addresses on a page boundary. But the re-calculation
also embeds the masking of high order bits that exceed the size of
the physical address space (via PHYSICAL_PAGE_MASK). If the masking
removes any high order bits, the size calculation results in a huge
value that is likely to immediately fail.

Fix this by re-calculating the page-aligned size first. Then mask any
high order bits using PHYSICAL_PAGE_MASK.

Fixes: ffa71f33 ("x86, ioremap: Fix incorrect physical address handling in PAE mode")
Signed-off-by: default avatarMichael Kelley <mikelley@microsoft.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Cc: <stable@kernel.org>
Link: https://lore.kernel.org/r/1668624097-14884-2-git-send-email-mikelley@microsoft.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent a2045d57

arch/x86/mm/ioremap.c

+7 −1
Original line number Diff line number Diff line
@@ -171,9 +171,15 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr, 
	 * Mappings have to be page-aligned

	 */

	offset = phys_addr & ~PAGE_MASK;

	phys_addr &= PHYSICAL_PAGE_MASK;

	phys_addr &= PAGE_MASK;

	size = PAGE_ALIGN(last_addr+1) - phys_addr;



	/*

	 * Mask out any bits not part of the actual physical

	 * address, like memory encryption bits.

	 */

	phys_addr &= PHYSICAL_PAGE_MASK;



	retval = reserve_memtype(phys_addr, (u64)phys_addr + size,

						pcm, &new_pcm);

	if (retval) {