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Commit 6bae1d96 authored by Sebastien Dugue's avatar Sebastien Dugue Committed by Greg Kroah-Hartman
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PCI: quirk: enable MSI Mapping on HT1000 



Add a quirk to enable the MSI mapping capability on HyperTransport bridges.

Wire Broadcom's HT1000 to use the quirk.

Signed-off-by: default avatarSebastien Dugue <sebastien.dugue@bull.net>
Acked-by: default avatar"Eric W. Biederman" <ebiederm@xmission.com>
Cc: Andy Currid <acurrid@nvidia.com>
Cc: Peer Chen <pchen@nvidia.com>
Cc: Prakash Punnoor <prakash@punnoor.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Acked-by: default avatarMichael Chan <mchan@broadcom.com>
Cc: Greg KH <greg@kroah.com>
Cc: Andy Currid <acurrid@nvidia.com>
Cc: Peer Chen <pchen@nvidia.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 6015fbef

drivers/pci/quirks.c

+27 −3
Original line number Diff line number Diff line
@@ -1711,9 +1711,33 @@ static void __devinit quirk_msi_ht_cap(struct pci_dev *dev) 
}

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE,

			quirk_msi_ht_cap);

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS,





/*

 *  Force enable MSI mapping capability on HT bridges

 */

static void __devinit quirk_msi_ht_cap_enable(struct pci_dev *dev)

{

	int pos, ttl = 48;



	pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING);

	while (pos && ttl--) {

		u8 flags;



		if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, &flags) == 0) {

			printk(KERN_INFO "PCI: Enabling HT MSI Mapping on %s\n",

			       pci_name(dev));



			pci_write_config_byte(dev, pos + HT_MSI_FLAGS,

					      flags | HT_MSI_FLAGS_ENABLE);

		}

		pos = pci_find_next_ht_capability(dev, pos,

						  HT_CAPTYPE_MSI_MAPPING);

	}

}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS,

			 PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB,

			quirk_msi_ht_cap);

			 quirk_msi_ht_cap_enable);



/* The nVidia CK804 chipset may have 2 HT MSI mappings.

 * MSI are supported if the MSI capability set in any of these mappings.