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Commit 6ab1e867 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v4.16/dt-clk-dts-signed' of... 

Merge tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "Few omap interconnect dts fixes for v4.16 merge window" from
Tony Lindgren:

Now that we have the dts clocks for the clkctrl clock and the
interconnect binding, we need to update the existing ti-sysc
users according to the binding to make it usable for drivers.

Apologies for not being able to send this earlier but it took
me few revisions to get the smartreflex changes right and
tested with yet to be posted patches to make smartreflex probe
with dts and I wanted to have it sit in next for a while to make
sure we're not introducing regressions for legacy platform data
based booting.

Note that this is based on a merge with commit 20a2742e
("dt-bindings: ti-sysc: Update binding for timers and capabilities")
to avoid a merge conflict with the binding changes.

* tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Update ti-sysc data for existing users
  ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
  dt-bindings: ti-sysc: Update binding for timers and capabilities
parents e8bfa042 e14d7e53

Documentation/devicetree/bindings/bus/ti-sysc.txt

+36 −0
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@ Required standard properties: 
		or one of the following derivative types for hardware

		needing special workarounds:



		"ti,sysc-omap2-timer"

		"ti,sysc-omap4-timer"

		"ti,sysc-omap3430-sr"

		"ti,sysc-omap3630-sr"

		"ti,sysc-omap4-sr"
@@ -49,6 +51,26 @@ Required standard properties: 


Optional properties:



- ti,sysc-mask	shall contain mask of supported register bits for the

		SYSCONFIG register as documented in the Technical Reference

		Manual (TRM) for the interconnect target module



- ti,sysc-midle	list of master idle modes supported by the interconnect

		target module as documented in the TRM for SYSCONFIG

		register MIDLEMODE bits



- ti,sysc-sidle	list of slave idle modes supported by the interconnect

		target module as documented in the TRM for SYSCONFIG

		register SIDLEMODE bits



- ti,sysc-delay-us	delay needed after OCP softreset before accssing

			SYSCONFIG register again



- ti,syss-mask	optional mask of reset done status bits as described in the

		TRM for SYSSTATUS registers, typically 1 with some devices

		having separate reset done bits for children like OHCI and

		EHCI



- clocks	clock specifier for each name in the clock-names as

		specified in the binding documentation for ti-clkctrl,

		typically available for all interconnect targets on TI SoCs
@@ -61,6 +83,9 @@ Optional properties: 
- ti,hwmods	optional TI interconnect module name to use legacy

		hwmod platform data



- ti,no-reset-on-init	interconnect target module should not be reset at init



- ti,no-idle-on-init	interconnect target module should not be idled at init



Example: Single instance of MUSB controller on omap4 using interconnect ranges

using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
@@ -74,6 +99,17 @@ using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000): 
		reg-names = "rev", "sysc", "syss";

		clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;

		clock-names = "fck";

		ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |

				 SYSC_OMAP2_SOFTRESET |

				 SYSC_OMAP2_AUTOIDLE)>;

		ti,sysc-midle = <SYSC_IDLE_FORCE>,

				<SYSC_IDLE_NO>,

				<SYSC_IDLE_SMART>;

		ti,sysc-sidle = <SYSC_IDLE_FORCE>,

				<SYSC_IDLE_NO>,

				<SYSC_IDLE_SMART>,

				<SYSC_IDLE_SMART_WKUP>;

		ti,syss-mask = <1>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0x2b000 0x1000>;

Documentation/devicetree/bindings/power/ti-smartreflex.txt

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ Required properties: 


compatible: Shall be one of the following:

	    "ti,omap3-smartreflex-core"

	    "ti,omap3-smartreflex-iva"

	    "ti,omap3-smartreflex-mpu-iva"

	    "ti,omap4-smartreflex-core"

	    "ti,omap4-smartreflex-mpu"

	    "ti,omap4-smartreflex-iva"

arch/arm/boot/dts/am3517.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -99,9 +99,5 @@ 
	status = "disabled";

};



&smartreflex_mpu_iva {

	status = "disabled";

};



/include/ "am35xx-clocks.dtsi"

/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"

arch/arm/boot/dts/dra7.dtsi

+20 −6
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ 
 * Based on "omap4.dtsi"

 */



#include <dt-bindings/bus/ti-sysc.h>

#include <dt-bindings/clock/dra7.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/pinctrl/dra.h>

#include <dt-bindings/clock/dra7.h>
@@ -1523,9 +1525,15 @@ 
		target-module@4a0dd000 {

			compatible = "ti,sysc-omap4-sr";

			ti,hwmods = "smartreflex_core";

			reg = <0x4a0dd000 0x4>,

			      <0x4a0dd008 0x4>;

			reg-names = "rev", "sysc";

			reg = <0x4a0dd038 0x4>;

			reg-names = "sysc";

			ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_CORE_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x4a0dd000 0x001000>;
@@ -1536,9 +1544,15 @@ 
		target-module@4a0d9000 {

			compatible = "ti,sysc-omap4-sr";

			ti,hwmods = "smartreflex_mpu";

			reg = <0x4a0d9000 0x4>,

			      <0x4a0d9008 0x4>;

			reg-names = "rev", "sysc";

			reg = <0x4a0d9038 0x4>;

			reg-names = "sysc";

			ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_MPU_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x4a0d9000 0x001000>;

arch/arm/boot/dts/omap3.dtsi

+0 −14
Original line number Diff line number Diff line
@@ -587,20 +587,6 @@ 
			dma-names = "rx";

		};



		smartreflex_core: smartreflex@480cb000 {

			compatible = "ti,omap3-smartreflex-core";

			ti,hwmods = "smartreflex_core";

			reg = <0x480cb000 0x400>;

			interrupts = <19>;

		};



		smartreflex_mpu_iva: smartreflex@480c9000 {

			compatible = "ti,omap3-smartreflex-iva";

			ti,hwmods = "smartreflex_mpu_iva";

			reg = <0x480c9000 0x400>;

			interrupts = <18>;

		};



		timer1: timer@48318000 {

			compatible = "ti,omap3430-timer";

			reg = <0x48318000 0x400>;