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Commit 6a2a0e73 authored by Pavel Roskin's avatar Pavel Roskin Committed by John W. Linville
Browse files

ath5k: fix typos, bad comment formatting and GHz in place of MHz

parent 86fbe17d
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+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
	static const s8 fr[] = { -78, -80 };
#endif
	if (level < 0 || level >= ARRAY_SIZE(sz)) {
		ATH5K_ERR(ah->ah_sc, "noise immuniy level %d out of range",
		ATH5K_ERR(ah->ah_sc, "noise immunity level %d out of range",
			  level);
		return;
	}
+13 −13
Original line number Diff line number Diff line
@@ -18,9 +18,9 @@
#ifndef _ATH5K_H
#define _ATH5K_H

/* TODO: Clean up channel debuging -doesn't work anyway- and start
/* TODO: Clean up channel debugging (doesn't work anyway) and start
 * working on reg. control code using all available eeprom information
 * -rev. engineering needed- */
 * (rev. engineering needed) */
#define CHAN_DEBUG	0

#include <linux/io.h>
@@ -156,7 +156,7 @@
} while (0)

/*
 * Some tuneable values (these should be changeable by the user)
 * Some tunable values (these should be changeable by the user)
 * TODO: Make use of them and add more options OR use debug/configfs
 */
#define AR5K_TUNE_DMA_BEACON_RESP		2
@@ -171,8 +171,8 @@
#define AR5K_TUNE_RSSI_THRES			129
/* This must be set when setting the RSSI threshold otherwise it can
 * prevent a reset. If AR5K_RSSI_THR is read after writing to it
 * the BMISS_THRES will be seen as 0, seems harware doesn't keep
 * track of it. Max value depends on harware. For AR5210 this is just 7.
 * the BMISS_THRES will be seen as 0, seems hardware doesn't keep
 * track of it. Max value depends on hardware. For AR5210 this is just 7.
 * For AR5211+ this seems to be up to 255. */
#define AR5K_TUNE_BMISS_THRES			7
#define AR5K_TUNE_REGISTER_DWELL_TIME		20000
@@ -380,7 +380,7 @@ struct ath5k_srev_name {
 * Modulation for Atheros' Turbo G and Turbo A, its supposed to provide a
 * throughput transmission speed up to 40Mbit/s-60Mbit/s at a 108Mbit/s
 * signaling rate achieved through the bonding of two 54Mbit/s 802.11g
 * channels. To use this feature your Access Point must also suport it.
 * channels. To use this feature your Access Point must also support it.
 * There is also a distinction between "static" and "dynamic" turbo modes:
 *
 * - Static: is the dumb version: devices set to this mode stick to it until
@@ -496,7 +496,7 @@ enum ath5k_tx_queue {
 */
enum ath5k_tx_queue_subtype {
	AR5K_WME_AC_BK = 0,	/*Background traffic*/
	AR5K_WME_AC_BE,		/*Best-effort (normal) traffic)*/
	AR5K_WME_AC_BE,		/*Best-effort (normal) traffic*/
	AR5K_WME_AC_VI,		/*Video traffic*/
	AR5K_WME_AC_VO,		/*Voice traffic*/
};
@@ -690,7 +690,7 @@ struct ath5k_gain {
#define CHANNEL_MODES		CHANNEL_ALL

/*
 * Used internaly for reset_tx_queue).
 * Used internally for ath5k_hw_reset_tx_queue().
 * Also see struct struct ieee80211_channel.
 */
#define IS_CHAN_XR(_c)	((_c->hw_value & CHANNEL_XR) != 0)
@@ -712,7 +712,7 @@ struct ath5k_athchan_2ghz {
\******************/

/**
 * Seems the ar5xxx harware supports up to 32 rates, indexed by 1-32.
 * Seems the ar5xxx hardware supports up to 32 rates, indexed by 1-32.
 *
 * The rate code is used to get the RX rate or set the TX rate on the
 * hardware descriptors. It is also used for internal modulation control
@@ -802,7 +802,7 @@ extern int ath5k_modparam_nohwcrypt;
 *	http://www.freepatentsonline.com/20030225739.html
 * @AR5K_INT_RXORN: Indicates we got RX overrun (eg. no more descriptors).
 *	Note that Rx overrun is not always fatal, on some chips we can continue
 *	operation without reseting the card, that's why int_fatal is not
 *	operation without resetting the card, that's why int_fatal is not
 *	common for all chips.
 * @AR5K_INT_TX: mask to identify received frame interrupts, of type
 *	AR5K_ISR_TXOK or AR5K_ISR_TXERR
@@ -832,13 +832,13 @@ extern int ath5k_modparam_nohwcrypt;
 *	AR5K_SIMR2_MCABT, AR5K_SIMR2_SSERR and AR5K_SIMR2_DPERR.
 * @AR5K_INT_GLOBAL: Used to clear and set the IER
 * @AR5K_INT_NOCARD: signals the card has been removed
 * @AR5K_INT_COMMON: common interrupts shared amogst MACs with the same
 * @AR5K_INT_COMMON: common interrupts shared among MACs with the same
 *	bit value
 *
 * These are mapped to take advantage of some common bits
 * between the MACs, to be able to set intr properties
 * easier. Some of them are not used yet inside hw.c. Most map
 * to the respective hw interrupt value as they are common amogst different
 * to the respective hw interrupt value as they are common among different
 * MACs.
 */
enum ath5k_int {
@@ -1358,7 +1358,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
				u8 mode, bool fast);

/*
 * Functions used internaly
 * Functions used internally
 */

static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
+2 −2
Original line number Diff line number Diff line
@@ -244,7 +244,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
	}


	/* Return on unsuported chips (unsupported eeprom etc) */
	/* Return on unsupported chips (unsupported eeprom etc) */
	if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) {
		ATH5K_ERR(sc, "Device not yet supported.\n");
		ret = -ENODEV;
@@ -285,7 +285,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
		ath5k_hw_reg_write(ah, 0x28000039, AR5K_PCIE_SERDES);
		ath5k_hw_reg_write(ah, 0x53160824, AR5K_PCIE_SERDES);

		/* If serdes programing is enabled, increase PCI-E
		/* If serdes programming is enabled, increase PCI-E
		 * tx power for systems with long trace from host
		 * to minicard connector. */
		if (ee->ee_serdes)
+7 −7
Original line number Diff line number Diff line
@@ -531,7 +531,7 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
	if (iter_data.n_stas > 1) {
		/* If you have multiple STA interfaces connected to
		 * different APs, ARPs are not received (most of the time?)
		 * Enabling PROMISC appears to fix that probem.
		 * Enabling PROMISC appears to fix that problem.
		 */
		sc->filter_flags |= AR5K_RX_FILTER_PROM;
	}
@@ -1349,7 +1349,7 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
	 * timestamp (beginning of phy frame, data frame, end of rx?).
	 * The only thing we know is that it is hardware specific...
	 * On AR5213 it seems the rx timestamp is at the end of the
	 * frame, but i'm not sure.
	 * frame, but I'm not sure.
	 *
	 * NOTE: mac80211 defines mactime at the beginning of the first
	 * data symbol. Since we don't have any time references it's
@@ -1764,7 +1764,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
	 * 4 beacons to make sure everybody hears our AP.
	 * When a client tries to associate, hw will keep
	 * track of the tx antenna to be used for this client
	 * automaticaly, based on ACKed packets.
	 * automatically, based on ACKed packets.
	 *
	 * Note: AP still listens and transmits RTS on the
	 * default antenna which is supposed to be an omni.
@@ -2099,11 +2099,11 @@ static void ath5k_tasklet_beacon(unsigned long data)
	 *
	 * In IBSS mode we use this interrupt just to
	 * keep track of the next TBTT (target beacon
	 * transmission time) in order to detect wether
	 * transmission time) in order to detect whether
	 * automatic TSF updates happened.
	 */
	if (sc->opmode == NL80211_IFTYPE_ADHOC) {
		/* XXX: only if VEOL suppported */
		/* XXX: only if VEOL supported */
		u64 tsf = ath5k_hw_get_tsf64(sc->ah);
		sc->nexttbtt += sc->bintval;
		ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
@@ -2466,7 +2466,7 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
						sc->ah->ah_radio_5ghz_revision),
						sc->ah->ah_radio_5ghz_revision);
			/* No 2GHz support (5110 and some
			 * 5Ghz only cards) -> report 5Ghz radio */
			 * 5GHz only cards) -> report 5GHz radio */
			} else if (!test_bit(AR5K_MODE_11B,
				sc->ah->ah_capabilities.cap_mode)) {
				ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n",
@@ -2796,7 +2796,7 @@ ath5k_init(struct ieee80211_hw *hw)

	/*
	 * Collect the channel list.  The 802.11 layer
	 * is resposible for filtering this list based
	 * is responsible for filtering this list based
	 * on settings like the phy mode and regulatory
	 * domain restrictions.
	 */
+2 −2
Original line number Diff line number Diff line
@@ -121,7 +121,7 @@ struct ath5k_statistics {
	/* frame errors */
	unsigned int rx_all_count;	/* all RX frames, including errors */
	unsigned int tx_all_count;	/* all TX frames, including errors */
	unsigned int rx_bytes_count;	/* all RX bytes, including errored pks
	unsigned int rx_bytes_count;	/* all RX bytes, including errored pkts
					 * and the MAC headers for each packet
					 */
	unsigned int tx_bytes_count;	/* all TX bytes, including errored pkts
@@ -250,7 +250,7 @@ struct ath5k_softc {
	unsigned int		nexttbtt;	/* next beacon time in TU */
	struct ath5k_txq	*cabq;		/* content after beacon */

	int			power_level;	/* Requested tx power in dbm */
	int			power_level;	/* Requested tx power in dBm */
	bool			assoc;		/* associate state */
	bool			enable_beacon;	/* true if beacons are on */

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