Loading Documentation/admin-guide/kernel-parameters.txt +7 −0 Original line number Diff line number Diff line Loading @@ -3959,6 +3959,13 @@ Run specified binary instead of /init from the ramdisk, used for early userspace startup. See initrd. rdrand= [X86] force - Override the decision by the kernel to hide the advertisement of RDRAND support (this affects certain AMD processors because of buggy BIOS support, specifically around the suspend/resume path). rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, Loading Makefile +1 −1 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0 VERSION = 4 PATCHLEVEL = 19 SUBLEVEL = 66 SUBLEVEL = 69 EXTRAVERSION = NAME = "People's Front" Loading arch/arm/boot/dts/bcm47094-linksys-panamera.dts +3 −0 Original line number Diff line number Diff line Loading @@ -125,6 +125,9 @@ }; mdio-bus-mux { #address-cells = <1>; #size-cells = <0>; /* BIT(9) = 1 => external mdio */ mdio_ext: mdio@200 { reg = <0x200>; Loading arch/arm/kvm/coproc.c +15 −8 Original line number Diff line number Diff line Loading @@ -658,13 +658,22 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run) } static void reset_coproc_regs(struct kvm_vcpu *vcpu, const struct coproc_reg *table, size_t num) const struct coproc_reg *table, size_t num, unsigned long *bmap) { unsigned long i; for (i = 0; i < num; i++) if (table[i].reset) if (table[i].reset) { int reg = table[i].reg; table[i].reset(vcpu, &table[i]); if (reg > 0 && reg < NR_CP15_REGS) { set_bit(reg, bmap); if (table[i].is_64bit) set_bit(reg + 1, bmap); } } } static struct coproc_params decode_32bit_hsr(struct kvm_vcpu *vcpu) Loading Loading @@ -1439,17 +1448,15 @@ void kvm_reset_coprocs(struct kvm_vcpu *vcpu) { size_t num; const struct coproc_reg *table; /* Catch someone adding a register without putting in reset entry. */ memset(vcpu->arch.ctxt.cp15, 0x42, sizeof(vcpu->arch.ctxt.cp15)); DECLARE_BITMAP(bmap, NR_CP15_REGS) = { 0, }; /* Generic chip reset first (so target could override). */ reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs)); reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs), bmap); table = get_target_table(vcpu->arch.target, &num); reset_coproc_regs(vcpu, table, num); reset_coproc_regs(vcpu, table, num, bmap); for (num = 1; num < NR_CP15_REGS; num++) WARN(vcpu_cp15(vcpu, num) == 0x42424242, WARN(!test_bit(num, bmap), "Didn't reset vcpu_cp15(vcpu, %zi)", num); } arch/arm/mach-davinci/sleep.S +1 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,7 @@ #define DEEPSLEEP_SLEEPENABLE_BIT BIT(31) .text .arch armv5te /* * Move DaVinci into deep sleep state * Loading Loading
Documentation/admin-guide/kernel-parameters.txt +7 −0 Original line number Diff line number Diff line Loading @@ -3959,6 +3959,13 @@ Run specified binary instead of /init from the ramdisk, used for early userspace startup. See initrd. rdrand= [X86] force - Override the decision by the kernel to hide the advertisement of RDRAND support (this affects certain AMD processors because of buggy BIOS support, specifically around the suspend/resume path). rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, Loading
Makefile +1 −1 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0 VERSION = 4 PATCHLEVEL = 19 SUBLEVEL = 66 SUBLEVEL = 69 EXTRAVERSION = NAME = "People's Front" Loading
arch/arm/boot/dts/bcm47094-linksys-panamera.dts +3 −0 Original line number Diff line number Diff line Loading @@ -125,6 +125,9 @@ }; mdio-bus-mux { #address-cells = <1>; #size-cells = <0>; /* BIT(9) = 1 => external mdio */ mdio_ext: mdio@200 { reg = <0x200>; Loading
arch/arm/kvm/coproc.c +15 −8 Original line number Diff line number Diff line Loading @@ -658,13 +658,22 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run) } static void reset_coproc_regs(struct kvm_vcpu *vcpu, const struct coproc_reg *table, size_t num) const struct coproc_reg *table, size_t num, unsigned long *bmap) { unsigned long i; for (i = 0; i < num; i++) if (table[i].reset) if (table[i].reset) { int reg = table[i].reg; table[i].reset(vcpu, &table[i]); if (reg > 0 && reg < NR_CP15_REGS) { set_bit(reg, bmap); if (table[i].is_64bit) set_bit(reg + 1, bmap); } } } static struct coproc_params decode_32bit_hsr(struct kvm_vcpu *vcpu) Loading Loading @@ -1439,17 +1448,15 @@ void kvm_reset_coprocs(struct kvm_vcpu *vcpu) { size_t num; const struct coproc_reg *table; /* Catch someone adding a register without putting in reset entry. */ memset(vcpu->arch.ctxt.cp15, 0x42, sizeof(vcpu->arch.ctxt.cp15)); DECLARE_BITMAP(bmap, NR_CP15_REGS) = { 0, }; /* Generic chip reset first (so target could override). */ reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs)); reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs), bmap); table = get_target_table(vcpu->arch.target, &num); reset_coproc_regs(vcpu, table, num); reset_coproc_regs(vcpu, table, num, bmap); for (num = 1; num < NR_CP15_REGS; num++) WARN(vcpu_cp15(vcpu, num) == 0x42424242, WARN(!test_bit(num, bmap), "Didn't reset vcpu_cp15(vcpu, %zi)", num); }
arch/arm/mach-davinci/sleep.S +1 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,7 @@ #define DEEPSLEEP_SLEEPENABLE_BIT BIT(31) .text .arch armv5te /* * Move DaVinci into deep sleep state * Loading