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Commit 694a20da authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull powerpc fixes from Michael Ellerman:
 "A larger batch of fixes than we'd like. Roughly 1/3 fixes for new
  code, 1/3 fixes for stable and 1/3 minor things.

  There's four commits fixing bugs when using 16GB huge pages on hash,
  caused by some of the preparatory changes for pkeys.

  Two fixes for bugs in the enhanced IRQ soft masking for local_t, one
  of which broke KVM in some circumstances.

  Four fixes for Power9. The most bizarre being a bug where futexes
  stopped working because a NULL pointer dereference didn't trap during
  early boot (it aliased the kernel mapping). A fix for memory hotplug
  when using the Radix MMU, and a fix for live migration of guests using
  the Radix MMU.

  Two fixes for hotplug on pseries machines. One where we weren't
  correctly updating NUMA info when CPUs are added and removed. And the
  other fixes crashes/hangs seen when doing memory hot remove during
  boot, which is apparently a thing people do.

  Finally a handful of build fixes for obscure configs and other minor
  fixes.

  Thanks to: Alexey Kardashevskiy, Aneesh Kumar K.V, Balbir Singh, Colin
  Ian King, Daniel Henrique Barboza, Florian Weimer, Guenter Roeck,
  Harish, Laurent Vivier, Madhavan Srinivasan, Mauricio Faria de
  Oliveira, Nathan Fontenot, Nicholas Piggin, Sam Bobroff"

* tag 'powerpc-4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  selftests/powerpc: Fix to use ucontext_t instead of struct ucontext
  powerpc/kdump: Fix powernv build break when KEXEC_CORE=n
  powerpc/pseries: Fix build break for SPLPAR=n and CPU hotplug
  powerpc/mm/hash64: Zero PGD pages on allocation
  powerpc/mm/hash64: Store the slot information at the right offset for hugetlb
  powerpc/mm/hash64: Allocate larger PMD table if hugetlb config is enabled
  powerpc/mm: Fix crashes with 16G huge pages
  powerpc/mm: Flush radix process translations when setting MMU type
  powerpc/vas: Don't set uses_vas for kernel windows
  powerpc/pseries: Enable RAS hotplug events later
  powerpc/mm/radix: Split linear mapping on hot-unplug
  powerpc/64s/radix: Boot-time NULL pointer protection using a guard-PID
  ocxl: fix signed comparison with less than zero
  powerpc/64s: Fix may_hard_irq_enable() for PMI soft masking
  powerpc/64s: Fix MASKABLE_RELON_EXCEPTION_HV_OOL macro
  powerpc/numa: Invalidate numa_cpu_lookup_table on cpu remove
parents 61f14c01 ecdf06e1

arch/powerpc/include/asm/book3s/32/pgtable.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#define PGD_INDEX_SIZE	(32 - PGDIR_SHIFT)



#define PMD_CACHE_INDEX	PMD_INDEX_SIZE

#define PUD_CACHE_INDEX	PUD_INDEX_SIZE



#ifndef __ASSEMBLY__

#define PTE_TABLE_SIZE	(sizeof(pte_t) << PTE_INDEX_SIZE)

arch/powerpc/include/asm/book3s/64/hash-4k.h

+2 −1
Original line number Diff line number Diff line
@@ -63,7 +63,8 @@ static inline int hash__hugepd_ok(hugepd_t hpd) 
 * keeping the prototype consistent across the two formats.

 */

static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,

			unsigned int subpg_index, unsigned long hidx)

					 unsigned int subpg_index, unsigned long hidx,

					 int offset)

{

	return (hidx << H_PAGE_F_GIX_SHIFT) &

		(H_PAGE_F_SECOND | H_PAGE_F_GIX);

arch/powerpc/include/asm/book3s/64/hash-64k.h

+11 −5
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ 
 * generic accessors and iterators here

 */

#define __real_pte __real_pte

static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep)

static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep, int offset)

{

	real_pte_t rpte;

	unsigned long *hidxp;
@@ -59,7 +59,7 @@ static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep) 
	 */

	smp_rmb();



	hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);

	hidxp = (unsigned long *)(ptep + offset);

	rpte.hidx = *hidxp;

	return rpte;

}
@@ -86,9 +86,10 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) 
 * expected to modify the PTE bits accordingly and commit the PTE to memory.

 */

static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,

		unsigned int subpg_index, unsigned long hidx)

					 unsigned int subpg_index,

					 unsigned long hidx, int offset)

{

	unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);

	unsigned long *hidxp = (unsigned long *)(ptep + offset);



	rpte.hidx &= ~HIDX_BITS(0xfUL, subpg_index);

	*hidxp = rpte.hidx  | HIDX_BITS(HIDX_SHIFT_BY_ONE(hidx), subpg_index);
@@ -140,13 +141,18 @@ static inline int hash__remap_4k_pfn(struct vm_area_struct *vma, unsigned long a 
}



#define H_PTE_TABLE_SIZE	PTE_FRAG_SIZE

#ifdef CONFIG_TRANSPARENT_HUGEPAGE

#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined (CONFIG_HUGETLB_PAGE)

#define H_PMD_TABLE_SIZE	((sizeof(pmd_t) << PMD_INDEX_SIZE) + \

				 (sizeof(unsigned long) << PMD_INDEX_SIZE))

#else

#define H_PMD_TABLE_SIZE	(sizeof(pmd_t) << PMD_INDEX_SIZE)

#endif

#ifdef CONFIG_HUGETLB_PAGE

#define H_PUD_TABLE_SIZE	((sizeof(pud_t) << PUD_INDEX_SIZE) +	\

				 (sizeof(unsigned long) << PUD_INDEX_SIZE))

#else

#define H_PUD_TABLE_SIZE	(sizeof(pud_t) << PUD_INDEX_SIZE)

#endif

#define H_PGD_TABLE_SIZE	(sizeof(pgd_t) << PGD_INDEX_SIZE)



#ifdef CONFIG_TRANSPARENT_HUGEPAGE

arch/powerpc/include/asm/book3s/64/hash.h

+12 −1
Original line number Diff line number Diff line
@@ -23,7 +23,8 @@ 
				 H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + PAGE_SHIFT)

#define H_PGTABLE_RANGE		(ASM_CONST(1) << H_PGTABLE_EADDR_SIZE)



#if defined(CONFIG_TRANSPARENT_HUGEPAGE) &&  defined(CONFIG_PPC_64K_PAGES)

#if (defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)) && \

	defined(CONFIG_PPC_64K_PAGES)

/*

 * only with hash 64k we need to use the second half of pmd page table

 * to store pointer to deposited pgtable_t
@@ -32,6 +33,16 @@ 
#else

#define H_PMD_CACHE_INDEX	H_PMD_INDEX_SIZE

#endif

/*

 * We store the slot details in the second half of page table.

 * Increase the pud level table so that hugetlb ptes can be stored

 * at pud level.

 */

#if defined(CONFIG_HUGETLB_PAGE) &&  defined(CONFIG_PPC_64K_PAGES)

#define H_PUD_CACHE_INDEX	(H_PUD_INDEX_SIZE + 1)

#else

#define H_PUD_CACHE_INDEX	(H_PUD_INDEX_SIZE)

#endif

/*

 * Define the address range of the kernel non-linear virtual area

 */

arch/powerpc/include/asm/book3s/64/pgalloc.h

+11 −5
Original line number Diff line number Diff line
@@ -73,10 +73,16 @@ static inline void radix__pgd_free(struct mm_struct *mm, pgd_t *pgd) 


static inline pgd_t *pgd_alloc(struct mm_struct *mm)

{

	pgd_t *pgd;



	if (radix_enabled())

		return radix__pgd_alloc(mm);

	return kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),



	pgd = kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),

			       pgtable_gfp_flags(mm, GFP_KERNEL));

	memset(pgd, 0, PGD_TABLE_SIZE);



	return pgd;

}



static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
@@ -93,13 +99,13 @@ static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud) 


static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)

{

	return kmem_cache_alloc(PGT_CACHE(PUD_INDEX_SIZE),

	return kmem_cache_alloc(PGT_CACHE(PUD_CACHE_INDEX),

		pgtable_gfp_flags(mm, GFP_KERNEL));

}



static inline void pud_free(struct mm_struct *mm, pud_t *pud)

{

	kmem_cache_free(PGT_CACHE(PUD_INDEX_SIZE), pud);

	kmem_cache_free(PGT_CACHE(PUD_CACHE_INDEX), pud);

}



static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
@@ -115,7 +121,7 @@ static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pud, 
	 * ahead and flush the page walk cache

	 */

	flush_tlb_pgtable(tlb, address);

        pgtable_free_tlb(tlb, pud, PUD_INDEX_SIZE);

	pgtable_free_tlb(tlb, pud, PUD_CACHE_INDEX);

}



static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)