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Commit 694625c0 authored by Randy Dunlap's avatar Randy Dunlap Committed by Greg Kroah-Hartman
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PCI: add pci_try_set_mwi 



As suggested by Andrew, add pci_try_set_mwi(), which does not require
return-value checking.

- add pci_try_set_mwi() without __must_check
- make it return 0 on success, errno if the "try" failed or error
- review callers

Signed-off-by: default avatarRandy Dunlap <randy.dunlap@oracle.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent f5609d7e

Documentation/pci.txt

+4 −1
Original line number Diff line number Diff line
@@ -296,7 +296,10 @@ If the PCI device can use the PCI Memory-Write-Invalidate transaction, 
call pci_set_mwi().  This enables the PCI_COMMAND bit for Mem-Wr-Inval

and also ensures that the cache line size register is set correctly.

Check the return value of pci_set_mwi() as not all architectures

or chip-sets may support Memory-Write-Invalidate.

or chip-sets may support Memory-Write-Invalidate.  Alternatively,

if Mem-Wr-Inval would be nice to have but is not required, call

pci_try_set_mwi() to have the system do its best effort at enabling

Mem-Wr-Inval.





3.2 Request MMIO/IOP resources

drivers/ata/pata_cs5530.c

+1 −1
Original line number Diff line number Diff line
@@ -266,7 +266,7 @@ static int cs5530_init_chip(void) 
	}



	pci_set_master(cs5530_0);

	pci_set_mwi(cs5530_0);

	pci_try_set_mwi(cs5530_0);



	/*

	 * Set PCI CacheLineSize to 16-bytes:

drivers/ide/pci/cs5530.c

+1 −1
Original line number Diff line number Diff line
@@ -236,7 +236,7 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch 
	 */



	pci_set_master(cs5530_0);

	pci_set_mwi(cs5530_0);

	pci_try_set_mwi(cs5530_0);



	/*

	 * Set PCI CacheLineSize to 16-bytes:

drivers/net/cassini.c

+2 −2
Original line number Diff line number Diff line
@@ -4917,13 +4917,13 @@ static int __devinit cas_init_one(struct pci_dev *pdev, 
	pci_cmd &= ~PCI_COMMAND_SERR;

	pci_cmd |= PCI_COMMAND_PARITY;

	pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);

	if (pci_set_mwi(pdev))

	if (pci_try_set_mwi(pdev))

		printk(KERN_WARNING PFX "Could not enable MWI for %s\n",

		       pci_name(pdev));



	/*

	 * On some architectures, the default cache line size set

	 * by pci_set_mwi reduces perforamnce.  We have to increase

	 * by pci_try_set_mwi reduces perforamnce.  We have to increase

	 * it for this case.  To start, we'll print some configuration

	 * data.

	 */

drivers/net/starfire.c

+1 −1
Original line number Diff line number Diff line
@@ -740,7 +740,7 @@ static int __devinit starfire_init_one(struct pci_dev *pdev, 
	pci_set_master(pdev);



	/* enable MWI -- it vastly improves Rx performance on sparc64 */

	pci_set_mwi(pdev);

	pci_try_set_mwi(pdev);



#ifdef ZEROCOPY

	/* Starfire can do TCP/UDP checksumming */