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Commit 68843129 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'omap-for-v3.9-rc3/fixes-signed' of...

Merge tag 'omap-for-v3.9-rc3/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren <tony@atomide.com>:

A clock regression fix that happened with the common clock
conversion, and few USB regression fixes.

* tag 'omap-for-v3.9-rc3/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized
  ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup
  ARM: OMAP3: hwmod data: keep MIDLEMODE in force-standby for musb
  ARM: OMAP4: clock data: lock USB DPLL on boot
  ARM: OMAP1: fix USB host on 1710

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b7e8c43c ff931c82
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+1 −11
Original line number Diff line number Diff line
@@ -538,15 +538,6 @@ static struct clk usb_hhc_ck16xx = {
};

static struct clk usb_dc_ck = {
	.name		= "usb_dc_ck",
	.ops		= &clkops_generic,
	/* Direct from ULPD, no parent */
	.rate		= 48000000,
	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),
	.enable_bit	= USB_REQ_EN_SHIFT,
};

static struct clk usb_dc_ck7xx = {
	.name		= "usb_dc_ck",
	.ops		= &clkops_generic,
	/* Direct from ULPD, no parent */
@@ -727,8 +718,7 @@ static struct omap_clk omap_clks[] = {
	CLK(NULL,	"usb_clko",	&usb_clko,	CK_16XX | CK_1510 | CK_310),
	CLK(NULL,	"usb_hhc_ck",	&usb_hhc_ck1510, CK_1510 | CK_310),
	CLK(NULL,	"usb_hhc_ck",	&usb_hhc_ck16xx, CK_16XX),
	CLK(NULL,	"usb_dc_ck",	&usb_dc_ck,	CK_16XX),
	CLK(NULL,	"usb_dc_ck",	&usb_dc_ck7xx,	CK_7XX),
	CLK(NULL,	"usb_dc_ck",	&usb_dc_ck,	CK_16XX | CK_7XX),
	CLK(NULL,	"mclk",		&mclk_1510,	CK_1510 | CK_310),
	CLK(NULL,	"mclk",		&mclk_16xx,	CK_16XX),
	CLK(NULL,	"bclk",		&bclk_1510,	CK_1510 | CK_310),
+20 −0
Original line number Diff line number Diff line
@@ -52,6 +52,13 @@
 */
#define OMAP4_DPLL_ABE_DEFFREQ				98304000

/*
 * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
 * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
 * locked frequency for the USB DPLL is 960MHz.
 */
#define OMAP4_DPLL_USB_DEFFREQ				960000000

/* Root clocks */

DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0);
@@ -1011,6 +1018,10 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel,
		    OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK,
		    hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops);

DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0,
		OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
		OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL);

DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0,
		OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL,
		OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
@@ -1538,6 +1549,7 @@ static struct omap_clk omap44xx_clks[] = {
	CLK(NULL,	"per_mcbsp4_gfclk",			&per_mcbsp4_gfclk,	CK_443X),
	CLK(NULL,	"hsmmc1_fclk",			&hsmmc1_fclk,	CK_443X),
	CLK(NULL,	"hsmmc2_fclk",			&hsmmc2_fclk,	CK_443X),
	CLK(NULL,	"ocp2scp_usb_phy_phy_48m",	&ocp2scp_usb_phy_phy_48m,	CK_443X),
	CLK(NULL,	"sha2md5_fck",			&sha2md5_fck,	CK_443X),
	CLK(NULL,	"slimbus1_fclk_1",		&slimbus1_fclk_1,	CK_443X),
	CLK(NULL,	"slimbus1_fclk_0",		&slimbus1_fclk_0,	CK_443X),
@@ -1705,5 +1717,13 @@ int __init omap4xxx_clk_init(void)
	if (rc)
		pr_err("%s: failed to configure ABE DPLL!\n", __func__);

	/*
	 * Lock USB DPLL on OMAP4 devices so that the L3INIT power
	 * domain can transition to retention state when not in use.
	 */
	rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ);
	if (rc)
		pr_err("%s: failed to configure USB DPLL!\n", __func__);

	return 0;
}
+3 −0
Original line number Diff line number Diff line
@@ -293,5 +293,8 @@ extern void omap_reserve(void);
struct omap_hwmod;
extern int omap_dss_reset(struct omap_hwmod *);

/* SoC specific clock initializer */
extern int (*omap_clk_init)(void);

#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
+12 −6
Original line number Diff line number Diff line
@@ -54,6 +54,12 @@
#include "prm3xxx.h"
#include "prm44xx.h"

/*
 * omap_clk_init: points to a function that does the SoC-specific
 * clock initializations
 */
int (*omap_clk_init)(void);

/*
 * The machine specific code may provide the extra mapping besides the
 * default mapping provided here.
@@ -397,7 +403,7 @@ void __init omap2420_init_early(void)
	omap242x_clockdomains_init();
	omap2420_hwmod_init();
	omap_hwmod_init_postsetup();
	omap2420_clk_init();
	omap_clk_init = omap2420_clk_init;
}

void __init omap2420_init_late(void)
@@ -427,7 +433,7 @@ void __init omap2430_init_early(void)
	omap243x_clockdomains_init();
	omap2430_hwmod_init();
	omap_hwmod_init_postsetup();
	omap2430_clk_init();
	omap_clk_init = omap2430_clk_init;
}

void __init omap2430_init_late(void)
@@ -462,7 +468,7 @@ void __init omap3_init_early(void)
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap3xxx_clk_init();
	omap_clk_init = omap3xxx_clk_init;
}

void __init omap3430_init_early(void)
@@ -500,7 +506,7 @@ void __init ti81xx_init_early(void)
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap3xxx_clk_init();
	omap_clk_init = omap3xxx_clk_init;
}

void __init omap3_init_late(void)
@@ -568,7 +574,7 @@ void __init am33xx_init_early(void)
	am33xx_clockdomains_init();
	am33xx_hwmod_init();
	omap_hwmod_init_postsetup();
	am33xx_clk_init();
	omap_clk_init = am33xx_clk_init;
}
#endif

@@ -593,7 +599,7 @@ void __init omap4430_init_early(void)
	omap44xx_clockdomains_init();
	omap44xx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap4xxx_clk_init();
	omap_clk_init = omap4xxx_clk_init;
}

void __init omap4430_init_late(void)
+5 −2
Original line number Diff line number Diff line
@@ -1368,7 +1368,9 @@ static void _enable_sysc(struct omap_hwmod *oh)
	}

	if (sf & SYSC_HAS_MIDLEMODE) {
		if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
		if (oh->flags & HWMOD_FORCE_MSTANDBY) {
			idlemode = HWMOD_IDLEMODE_FORCE;
		} else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
			idlemode = HWMOD_IDLEMODE_NO;
		} else {
			if (sf & SYSC_HAS_ENAWAKEUP)
@@ -1440,7 +1442,8 @@ static void _idle_sysc(struct omap_hwmod *oh)
	}

	if (sf & SYSC_HAS_MIDLEMODE) {
		if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
		if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
		    (oh->flags & HWMOD_FORCE_MSTANDBY)) {
			idlemode = HWMOD_IDLEMODE_FORCE;
		} else {
			if (sf & SYSC_HAS_ENAWAKEUP)
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