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Commit 6796b129 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-next 

- Re-architecture of the code to handle proprietary fw, more abstracted
to support the multitude of differences that NVIDIA introduce
- Support in the said code for GP10x ACR and GR fw, giving acceleration
support \o/
- Fix for GTX 970 GPUs that are in an odd MMU configuration

* 'linux-4.12' of git://github.com/skeggsb/linux: (60 commits)
  drm/nouveau/fb/gf100-: rework ram detection
  drm/nouveau/fb/gm200: split ram implementation from gm107
  drm/nouveau/fb/gf108: split implementation from gf100
  drm/nouveau/fb/gf100-: modify constructors to allow more customisation
  drm/nouveau/kms/nv50: use drm core i2c-over-aux algorithm
  drm/nouveau/i2c/g94-: return REPLY_M value on reads
  drm/nouveau/i2c: modify aux interface to return length actually transferred
  drm/nouveau/gp10x: enable secboot and GR
  drm/nouveau/gr/gp102: initial support
  drm/nouveau/falcon: support for gp10x msgqueue
  drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support
  drm/nouveau/secboot: put HS code loading code into own file
  drm/nouveau/secboot: support for r375 ACR
  drm/nouveau/secboot: support for r367 ACR
  drm/nouveau/secboot: support for r364 ACR
  drm/nouveau/secboot: workaround bug when starting SEC2 firmware
  drm/nouveau/secboot: support standard NVIDIA HS binaries
  drm/nouveau/secboot: support for unload blob bootloader
  drm/nouveau/secboot: let callers interpret return value of blobs
  drm/nouveau/secboot: support for different load and unload falcons
  ...
parents 2e161017 97e5268d

drivers/gpu/drm/nouveau/include/nvif/class.h

+2 −0
Original line number Diff line number Diff line
@@ -125,6 +125,7 @@ 
#define MAXWELL_B                                     /* cl9097.h */ 0x0000b197



#define PASCAL_A                                      /* cl9097.h */ 0x0000c097

#define PASCAL_B                                      /* cl9097.h */ 0x0000c197



#define NV74_BSP                                                     0x000074b0
@@ -163,6 +164,7 @@ 
#define MAXWELL_COMPUTE_A                                            0x0000b0c0

#define MAXWELL_COMPUTE_B                                            0x0000b1c0

#define PASCAL_COMPUTE_A                                             0x0000c0c0

#define PASCAL_COMPUTE_B                                             0x0000c1c0



#define NV74_CIPHER                                                  0x000074c1

#endif

drivers/gpu/drm/nouveau/include/nvkm/core/device.h

+5 −2
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ enum nvkm_devidx { 
	NVKM_ENGINE_NVDEC,

	NVKM_ENGINE_PM,

	NVKM_ENGINE_SEC,

	NVKM_ENGINE_SEC2,

	NVKM_ENGINE_SW,

	NVKM_ENGINE_VIC,

	NVKM_ENGINE_VP,
@@ -155,9 +156,10 @@ struct nvkm_device { 
	struct nvkm_engine *msppp;

	struct nvkm_engine *msvld;

	struct nvkm_engine *nvenc[3];

	struct nvkm_engine *nvdec;

	struct nvkm_nvdec *nvdec;

	struct nvkm_pm *pm;

	struct nvkm_engine *sec;

	struct nvkm_sec2 *sec2;

	struct nvkm_sw *sw;

	struct nvkm_engine *vic;

	struct nvkm_engine *vp;
@@ -225,9 +227,10 @@ struct nvkm_device_chip { 
	int (*msppp   )(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*msvld   )(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*nvenc[3])(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*nvdec   )(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*nvdec   )(struct nvkm_device *, int idx, struct nvkm_nvdec **);

	int (*pm      )(struct nvkm_device *, int idx, struct nvkm_pm **);

	int (*sec     )(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*sec2    )(struct nvkm_device *, int idx, struct nvkm_sec2 **);

	int (*sw      )(struct nvkm_device *, int idx, struct nvkm_sw **);

	int (*vic     )(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*vp      )(struct nvkm_device *, int idx, struct nvkm_engine **);

drivers/gpu/drm/nouveau/include/nvkm/core/msgqueue.h

0 → 100644
+47 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 */



#ifndef __NVKM_CORE_MSGQUEUE_H

#define __NVKM_CORE_MSGQUEUE_H



#include <core/os.h>



struct nvkm_falcon;

struct nvkm_msgqueue;

enum nvkm_secboot_falcon;



/* Hopefully we will never have firmware arguments larger than that... */

#define NVKM_MSGQUEUE_CMDLINE_SIZE 0x100



int nvkm_msgqueue_new(u32, struct nvkm_falcon *, struct nvkm_msgqueue **);

void nvkm_msgqueue_del(struct nvkm_msgqueue **);

void nvkm_msgqueue_recv(struct nvkm_msgqueue *);

int nvkm_msgqueue_reinit(struct nvkm_msgqueue *);



/* useful if we run a NVIDIA-signed firmware */

void nvkm_msgqueue_write_cmdline(struct nvkm_msgqueue *, void *);



/* interface to ACR unit running on falcon (NVIDIA signed firmware) */

int nvkm_msgqueue_acr_boot_falcon(struct nvkm_msgqueue *,

				  enum nvkm_secboot_falcon);



#endif

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

+9 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ enum nvkm_falcon_dmaidx { 
	FALCON_DMAIDX_PHYS_VID		= 2,

	FALCON_DMAIDX_PHYS_SYS_COH	= 3,

	FALCON_DMAIDX_PHYS_SYS_NCOH	= 4,

	FALCON_SEC2_DMAIDX_UCODE	= 6,

};



struct nvkm_falcon {
@@ -19,11 +20,13 @@ struct nvkm_falcon { 
	u32 addr;



	struct mutex mutex;

	struct mutex dmem_mutex;

	const struct nvkm_subdev *user;



	u8 version;

	u8 secret;

	bool debug;

	bool has_emem;



	struct nvkm_memory *core;

	bool external;
@@ -45,8 +48,14 @@ struct nvkm_falcon { 
	struct nvkm_engine engine;

};



/* This constructor must be called from the owner's oneinit() hook and

 * *not* its constructor.  This is to ensure that DEVINIT has been

 * completed, and that the device is correctly enabled before we touch

 * falcon registers.

 */

int nvkm_falcon_v1_new(struct nvkm_subdev *owner, const char *name, u32 addr,

		       struct nvkm_falcon **);



void nvkm_falcon_del(struct nvkm_falcon **);

int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);

void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);

drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h

+1 −0
Original line number Diff line number Diff line
@@ -43,4 +43,5 @@ int gm107_gr_new(struct nvkm_device *, int, struct nvkm_gr **); 
int gm200_gr_new(struct nvkm_device *, int, struct nvkm_gr **);

int gm20b_gr_new(struct nvkm_device *, int, struct nvkm_gr **);

int gp100_gr_new(struct nvkm_device *, int, struct nvkm_gr **);

int gp102_gr_new(struct nvkm_device *, int, struct nvkm_gr **);

#endif