Merge "msm: kgsl: Add support for a650" (669013c6) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/gpu/msm/adreno-gpulist.h

+19 −0

Original line number	Diff line number	Diff line
		@@ -434,6 +434,25 @@ static const struct adreno_gpu_core adreno_gpulist[] = {
		.gpmu_tsens = 0x000C000D,
		.max_power = 5448,
		},
		{
		.gpurev = ADRENO_REV_A650,
		.core = 6,
		.major = 5,
		.minor = 0,
		.patchid = 0,
		.features = ADRENO_64BIT \| ADRENO_RPMH \| ADRENO_GPMU,
		.sqefw_name = "a650_sqe.fw",
		.zap_name = "a650_zap",
		.gpudev = &adreno_a6xx_gpudev,
		.gmem_size = SZ_1M + SZ_128K, /* verified 1152kB */
		.num_protected_regs = 0x30,
		.busy_mask = 0xFFFFFFFE,
		.gpmufw_name = "a650_gmu.bin",
		.gpmu_major = 0x2,
		.gpmu_minor = 0x000,
		.gpmu_tsens = 0x000C000D,
		.max_power = 5448,
		},
		{
		.gpurev = ADRENO_REV_A680,
		.core = 6,

drivers/gpu/msm/adreno.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -215,6 +215,7 @@ enum adreno_gpurev {
		ADRENO_REV_A618 = 618,
		ADRENO_REV_A630 = 630,
		ADRENO_REV_A640 = 640,
		ADRENO_REV_A650 = 650,
		ADRENO_REV_A680 = 680,
		};

		@@ -1281,6 +1282,7 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev)
		ADRENO_TARGET(a608, ADRENO_REV_A608)
		ADRENO_TARGET(a630, ADRENO_REV_A630)
		ADRENO_TARGET(a640, ADRENO_REV_A640)
		ADRENO_TARGET(a650, ADRENO_REV_A650)
		ADRENO_TARGET(a680, ADRENO_REV_A680)

		/*

drivers/gpu/msm/adreno_a6xx.c

+65 −1

Original line number	Diff line number	Diff line
		@@ -56,10 +56,20 @@ static const struct adreno_vbif_data a640_gbif[] = {
		{0, 0},
		};

		static const struct adreno_vbif_data a650_gbif[] = {
		{A6XX_GBIF_QSB_SIDE0, 0x00071620},
		{A6XX_GBIF_QSB_SIDE1, 0x00071620},
		{A6XX_GBIF_QSB_SIDE2, 0x00071620},
		{A6XX_GBIF_QSB_SIDE3, 0x00071620},
		{A6XX_RBBM_GBIF_CLIENT_QOS_CNTL, 0x3},
		{0, 0},
		};

		static const struct adreno_vbif_platform a6xx_vbif_platforms[] = {
		{ adreno_is_a630, a630_vbif },
		{ adreno_is_a615_family, a615_gbif },
		{ adreno_is_a640, a640_gbif },
		{ adreno_is_a650, a650_gbif },
		{ adreno_is_a680, a640_gbif },
		{ adreno_is_a608, a615_gbif },
		};
		@@ -294,6 +304,59 @@ static const struct kgsl_hwcg_reg a640_hwcg_regs[] = {
		{A6XX_RBBM_CLOCK_HYST_GMU_GX, 0x00000555},
		};

		static const struct kgsl_hwcg_reg a650_hwcg_regs[] = {
		{A6XX_RBBM_CLOCK_CNTL_SP0, 0x02222222},
		{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02222220},
		{A6XX_RBBM_CLOCK_DELAY_SP0, 0x00000080},
		{A6XX_RBBM_CLOCK_HYST_SP0, 0x0000F3CF},
		{A6XX_RBBM_CLOCK_CNTL_TP0, 0x02222222},
		{A6XX_RBBM_CLOCK_CNTL2_TP0, 0x22222222},
		{A6XX_RBBM_CLOCK_CNTL3_TP0, 0x22222222},
		{A6XX_RBBM_CLOCK_CNTL4_TP0, 0x00022222},
		{A6XX_RBBM_CLOCK_DELAY_TP0, 0x11111111},
		{A6XX_RBBM_CLOCK_DELAY2_TP0, 0x11111111},
		{A6XX_RBBM_CLOCK_DELAY3_TP0, 0x11111111},
		{A6XX_RBBM_CLOCK_DELAY4_TP0, 0x00011111},
		{A6XX_RBBM_CLOCK_HYST_TP0, 0x77777777},
		{A6XX_RBBM_CLOCK_HYST2_TP0, 0x77777777},
		{A6XX_RBBM_CLOCK_HYST3_TP0, 0x77777777},
		{A6XX_RBBM_CLOCK_HYST4_TP0, 0x00077777},
		{A6XX_RBBM_CLOCK_CNTL_RB0, 0x22222222},
		{A6XX_RBBM_CLOCK_CNTL2_RB0, 0x01002222},
		{A6XX_RBBM_CLOCK_CNTL_CCU0, 0x00002220},
		{A6XX_RBBM_CLOCK_HYST_RB_CCU0, 0x00040F00},
		{A6XX_RBBM_CLOCK_CNTL_RAC, 0x25222022},
		{A6XX_RBBM_CLOCK_CNTL2_RAC, 0x00005555},
		{A6XX_RBBM_CLOCK_DELAY_RAC, 0x00000011},
		{A6XX_RBBM_CLOCK_HYST_RAC, 0x00445044},
		{A6XX_RBBM_CLOCK_CNTL_TSE_RAS_RBBM, 0x04222222},
		{A6XX_RBBM_CLOCK_MODE_VFD, 0x00002222},
		{A6XX_RBBM_CLOCK_MODE_GPC, 0x00222222},
		{A6XX_RBBM_CLOCK_DELAY_HLSQ_2, 0x00000002},
		{A6XX_RBBM_CLOCK_MODE_HLSQ, 0x00002222},
		{A6XX_RBBM_CLOCK_DELAY_TSE_RAS_RBBM, 0x00004000},
		{A6XX_RBBM_CLOCK_DELAY_VFD, 0x00002222},
		{A6XX_RBBM_CLOCK_DELAY_GPC, 0x00000200},
		{A6XX_RBBM_CLOCK_DELAY_HLSQ, 0x00000000},
		{A6XX_RBBM_CLOCK_HYST_TSE_RAS_RBBM, 0x00000000},
		{A6XX_RBBM_CLOCK_HYST_VFD, 0x00000000},
		{A6XX_RBBM_CLOCK_HYST_GPC, 0x04104004},
		{A6XX_RBBM_CLOCK_HYST_HLSQ, 0x00000000},
		{A6XX_RBBM_CLOCK_CNTL_TEX_FCHE, 0x00000222},
		{A6XX_RBBM_CLOCK_DELAY_TEX_FCHE, 0x00000111},
		{A6XX_RBBM_CLOCK_HYST_TEX_FCHE, 0x00000777},
		{A6XX_RBBM_CLOCK_CNTL_UCHE, 0x22222222},
		{A6XX_RBBM_CLOCK_HYST_UCHE, 0x00000004},
		{A6XX_RBBM_CLOCK_DELAY_UCHE, 0x00000002},
		{A6XX_RBBM_ISDB_CNT, 0x00000182},
		{A6XX_RBBM_RAC_THRESHOLD_CNT, 0x00000000},
		{A6XX_RBBM_SP_HYST_CNT, 0x00000000},
		{A6XX_RBBM_CLOCK_CNTL_GMU_GX, 0x00000222},
		{A6XX_RBBM_CLOCK_DELAY_GMU_GX, 0x00000111},
		{A6XX_RBBM_CLOCK_HYST_GMU_GX, 0x00000555},
		};


		static const struct kgsl_hwcg_reg a608_hwcg_regs[] = {
		{A6XX_RBBM_CLOCK_CNTL_SP0, 0x22222222},
		{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02222220},
		@@ -354,6 +417,7 @@ static const struct {
		{adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)},
		{adreno_is_a615_family, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)},
		{adreno_is_a640, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)},
		{adreno_is_a650, a650_hwcg_regs, ARRAY_SIZE(a650_hwcg_regs)},
		{adreno_is_a680, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)},
		{adreno_is_a608, a608_hwcg_regs, ARRAY_SIZE(a608_hwcg_regs)},
		};
		@@ -810,7 +874,7 @@ static void a6xx_start(struct adreno_device *adreno_dev)
		kgsl_regwrite(device, A6XX_UCHE_CACHE_WAYS, 0x4);

		/* ROQ sizes are twice as big on a640/a680 than on a630 */
		if (adreno_is_a640(adreno_dev) \|\| adreno_is_a680(adreno_dev)) {
		if (ADRENO_GPUREV(adreno_dev) >= ADRENO_REV_A640) {
		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_2, 0x02000140);
		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_1, 0x8040362C);
		} else if (adreno_is_a608(adreno_dev)) {