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Commit 6657fca0 authored by Kirill A. Shutemov's avatar Kirill A. Shutemov Committed by Ingo Molnar
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x86/mm: Allow to boot without LA57 if CONFIG_X86_5LEVEL=y



All pieces of the puzzle are in place and we can now allow to boot with
CONFIG_X86_5LEVEL=y on a machine without LA57 support.

Kernel will detect that LA57 is missing and fold p4d at runtime.

Update the documentation and the Kconfig option description to reflect the
change.

Signed-off-by: default avatarKirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20180214182542.69302-10-kirill.shutemov@linux.intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 91f606a8
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+3 −6
Original line number Diff line number Diff line
@@ -20,12 +20,9 @@ Documentation/x86/x86_64/mm.txt

CONFIG_X86_5LEVEL=y enables the feature.

So far, a kernel compiled with the option enabled will be able to boot
only on machines that supports the feature -- see for 'la57' flag in
/proc/cpuinfo.

The plan is to implement boot-time switching between 4- and 5-level paging
in the future.
Kernel with CONFIG_X86_5LEVEL=y still able to boot on 4-level hardware.
In this case additional page table level -- p4d -- will be folded at
runtime.

== User-space and large virtual address space ==

+2 −2
Original line number Diff line number Diff line
@@ -1440,8 +1440,8 @@ config X86_5LEVEL

	  It will be supported by future Intel CPUs.

	  Note: a kernel with this option enabled can only be booted
	  on machines that support the feature.
	  A kernel with the option enabled can be booted on machines that
	  support 4- or 5-level paging.

	  See Documentation/x86/x86_64/5level-paging.txt for more
	  information.
+0 −16
Original line number Diff line number Diff line
@@ -169,16 +169,6 @@ void __puthex(unsigned long value)
	}
}

static bool l5_supported(void)
{
	/* Check if leaf 7 is supported. */
	if (native_cpuid_eax(0) < 7)
		return 0;

	/* Check if la57 is supported. */
	return native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31));
}

#if CONFIG_X86_NEED_RELOCS
static void handle_relocations(void *output, unsigned long output_len,
			       unsigned long virt_addr)
@@ -372,12 +362,6 @@ asmlinkage __visible void *extract_kernel(void *rmode, memptr heap,
	console_init();
	debug_putstr("early console in extract_kernel\n");

	if (IS_ENABLED(CONFIG_X86_5LEVEL) && !l5_supported()) {
		error("This linux kernel as configured requires 5-level paging\n"
			"This CPU does not support the required 'cr4.la57' feature\n"
			"Unable to boot - please use a kernel appropriate for your CPU\n");
	}

	free_mem_ptr     = heap;	/* Heap */
	free_mem_end_ptr = heap + BOOT_HEAP_SIZE;

+1 −7
Original line number Diff line number Diff line
@@ -53,12 +53,6 @@
# define NEED_MOVBE	0
#endif

#ifdef CONFIG_X86_5LEVEL
# define NEED_LA57	(1<<(X86_FEATURE_LA57 & 31))
#else
# define NEED_LA57	0
#endif

#ifdef CONFIG_X86_64
#ifdef CONFIG_PARAVIRT
/* Paravirtualized systems may not have PSE or PGE available */
@@ -104,7 +98,7 @@
#define REQUIRED_MASK13	0
#define REQUIRED_MASK14	0
#define REQUIRED_MASK15	0
#define REQUIRED_MASK16	(NEED_LA57)
#define REQUIRED_MASK16	0
#define REQUIRED_MASK17	0
#define REQUIRED_MASK18	0
#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)