Loading drivers/gpu/msm/adreno_dispatch.c +3 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2013-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/slab.h> Loading Loading @@ -1152,7 +1153,8 @@ static inline bool _verify_ib(struct kgsl_device_private *dev_priv, } /* Make sure that the address is mapped */ if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, ib->gpuaddr)) { if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, ib->gpuaddr, ib->size)) { pr_context(device, context, "ctxt %d invalid ib gpuaddr %llX\n", context->id, ib->gpuaddr); return false; Loading drivers/gpu/msm/kgsl.c +2 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2008-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <uapi/linux/sched/types.h> Loading Loading @@ -1315,7 +1316,7 @@ kgsl_sharedmem_find(struct kgsl_process_private *private, uint64_t gpuaddr) if (!private) return NULL; if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, gpuaddr)) if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, gpuaddr, 0)) return NULL; spin_lock(&private->mem_lock); Loading drivers/gpu/msm/kgsl_iommu.c +6 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2011-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/compat.h> Loading Loading @@ -2578,20 +2579,21 @@ static int kgsl_iommu_svm_range(struct kgsl_pagetable *pagetable, } static bool kgsl_iommu_addr_in_range(struct kgsl_pagetable *pagetable, uint64_t gpuaddr) uint64_t gpuaddr, uint64_t size) { struct kgsl_iommu_pt *pt = pagetable->priv; if (gpuaddr == 0) return false; if (gpuaddr >= pt->va_start && gpuaddr < pt->va_end) if (gpuaddr >= pt->va_start && (gpuaddr + size) < pt->va_end) return true; if (gpuaddr >= pt->compat_va_start && gpuaddr < pt->compat_va_end) if (gpuaddr >= pt->compat_va_start && (gpuaddr + size) < pt->compat_va_end) return true; if (gpuaddr >= pt->svm_start && gpuaddr < pt->svm_end) if (gpuaddr >= pt->svm_start && (gpuaddr + size) < pt->svm_end) return true; return false; Loading drivers/gpu/msm/kgsl_mmu.c +5 −3 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2002,2007-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/slab.h> Loading Loading @@ -600,10 +601,11 @@ enum kgsl_mmutype kgsl_mmu_get_mmutype(struct kgsl_device *device) EXPORT_SYMBOL(kgsl_mmu_get_mmutype); bool kgsl_mmu_gpuaddr_in_range(struct kgsl_pagetable *pagetable, uint64_t gpuaddr) uint64_t gpuaddr, uint64_t size) { if (PT_OP_VALID(pagetable, addr_in_range)) return pagetable->pt_ops->addr_in_range(pagetable, gpuaddr); return pagetable->pt_ops->addr_in_range(pagetable, gpuaddr, size); return false; } Loading Loading @@ -639,7 +641,7 @@ EXPORT_SYMBOL(kgsl_mmu_get_qtimer_global_entry); */ static bool nommu_gpuaddr_in_range(struct kgsl_pagetable *pagetable, uint64_t gpuaddr) uint64_t gpuaddr, uint64_t size) { return (gpuaddr != 0) ? true : false; } Loading drivers/gpu/msm/kgsl_mmu.h +4 −2 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __KGSL_MMU_H #define __KGSL_MMU_H Loading Loading @@ -97,7 +98,7 @@ struct kgsl_mmu_pt_ops { int (*svm_range)(struct kgsl_pagetable *pt, uint64_t *lo, uint64_t *hi, uint64_t memflags); bool (*addr_in_range)(struct kgsl_pagetable *pagetable, uint64_t gpuaddr); uint64_t gpuaddr, uint64_t size); int (*mmu_map_offset)(struct kgsl_pagetable *pt, uint64_t virtaddr, uint64_t virtoffset, struct kgsl_memdesc *memdesc, uint64_t physoffset, Loading Loading @@ -197,7 +198,8 @@ void kgsl_mmu_put_gpuaddr(struct kgsl_memdesc *memdesc); unsigned int kgsl_virtaddr_to_physaddr(void *virtaddr); unsigned int kgsl_mmu_log_fault_addr(struct kgsl_mmu *mmu, u64 ttbr0, uint64_t addr); bool kgsl_mmu_gpuaddr_in_range(struct kgsl_pagetable *pt, uint64_t gpuaddr); bool kgsl_mmu_gpuaddr_in_range(struct kgsl_pagetable *pt, uint64_t gpuaddr, uint64_t size); int kgsl_mmu_get_region(struct kgsl_pagetable *pagetable, uint64_t gpuaddr, uint64_t size); Loading Loading
drivers/gpu/msm/adreno_dispatch.c +3 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2013-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/slab.h> Loading Loading @@ -1152,7 +1153,8 @@ static inline bool _verify_ib(struct kgsl_device_private *dev_priv, } /* Make sure that the address is mapped */ if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, ib->gpuaddr)) { if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, ib->gpuaddr, ib->size)) { pr_context(device, context, "ctxt %d invalid ib gpuaddr %llX\n", context->id, ib->gpuaddr); return false; Loading
drivers/gpu/msm/kgsl.c +2 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2008-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <uapi/linux/sched/types.h> Loading Loading @@ -1315,7 +1316,7 @@ kgsl_sharedmem_find(struct kgsl_process_private *private, uint64_t gpuaddr) if (!private) return NULL; if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, gpuaddr)) if (!kgsl_mmu_gpuaddr_in_range(private->pagetable, gpuaddr, 0)) return NULL; spin_lock(&private->mem_lock); Loading
drivers/gpu/msm/kgsl_iommu.c +6 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2011-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/compat.h> Loading Loading @@ -2578,20 +2579,21 @@ static int kgsl_iommu_svm_range(struct kgsl_pagetable *pagetable, } static bool kgsl_iommu_addr_in_range(struct kgsl_pagetable *pagetable, uint64_t gpuaddr) uint64_t gpuaddr, uint64_t size) { struct kgsl_iommu_pt *pt = pagetable->priv; if (gpuaddr == 0) return false; if (gpuaddr >= pt->va_start && gpuaddr < pt->va_end) if (gpuaddr >= pt->va_start && (gpuaddr + size) < pt->va_end) return true; if (gpuaddr >= pt->compat_va_start && gpuaddr < pt->compat_va_end) if (gpuaddr >= pt->compat_va_start && (gpuaddr + size) < pt->compat_va_end) return true; if (gpuaddr >= pt->svm_start && gpuaddr < pt->svm_end) if (gpuaddr >= pt->svm_start && (gpuaddr + size) < pt->svm_end) return true; return false; Loading
drivers/gpu/msm/kgsl_mmu.c +5 −3 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2002,2007-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/slab.h> Loading Loading @@ -600,10 +601,11 @@ enum kgsl_mmutype kgsl_mmu_get_mmutype(struct kgsl_device *device) EXPORT_SYMBOL(kgsl_mmu_get_mmutype); bool kgsl_mmu_gpuaddr_in_range(struct kgsl_pagetable *pagetable, uint64_t gpuaddr) uint64_t gpuaddr, uint64_t size) { if (PT_OP_VALID(pagetable, addr_in_range)) return pagetable->pt_ops->addr_in_range(pagetable, gpuaddr); return pagetable->pt_ops->addr_in_range(pagetable, gpuaddr, size); return false; } Loading Loading @@ -639,7 +641,7 @@ EXPORT_SYMBOL(kgsl_mmu_get_qtimer_global_entry); */ static bool nommu_gpuaddr_in_range(struct kgsl_pagetable *pagetable, uint64_t gpuaddr) uint64_t gpuaddr, uint64_t size) { return (gpuaddr != 0) ? true : false; } Loading
drivers/gpu/msm/kgsl_mmu.h +4 −2 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __KGSL_MMU_H #define __KGSL_MMU_H Loading Loading @@ -97,7 +98,7 @@ struct kgsl_mmu_pt_ops { int (*svm_range)(struct kgsl_pagetable *pt, uint64_t *lo, uint64_t *hi, uint64_t memflags); bool (*addr_in_range)(struct kgsl_pagetable *pagetable, uint64_t gpuaddr); uint64_t gpuaddr, uint64_t size); int (*mmu_map_offset)(struct kgsl_pagetable *pt, uint64_t virtaddr, uint64_t virtoffset, struct kgsl_memdesc *memdesc, uint64_t physoffset, Loading Loading @@ -197,7 +198,8 @@ void kgsl_mmu_put_gpuaddr(struct kgsl_memdesc *memdesc); unsigned int kgsl_virtaddr_to_physaddr(void *virtaddr); unsigned int kgsl_mmu_log_fault_addr(struct kgsl_mmu *mmu, u64 ttbr0, uint64_t addr); bool kgsl_mmu_gpuaddr_in_range(struct kgsl_pagetable *pt, uint64_t gpuaddr); bool kgsl_mmu_gpuaddr_in_range(struct kgsl_pagetable *pt, uint64_t gpuaddr, uint64_t size); int kgsl_mmu_get_region(struct kgsl_pagetable *pagetable, uint64_t gpuaddr, uint64_t size); Loading