Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 66204d83 authored by Tony Truong's avatar Tony Truong Committed by Gerrit - the friendly Code Review server
Browse files

msm: pcie: add support for RUMI 



Supporting PCIe bus driver on RUMI requires additional reset
sequence and RUMI specific registers. Retrieve the RUMI
specific register base from devicetree. Also, ignore
PCIe PHY status check since RUMI does not support it.

Change-Id: I8dbc2394616ece6c25d6c0173c40072cfc7e79bb
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent 97289fd1

drivers/pci/controller/pci-msm.c

+48 −1
Original line number Diff line number Diff line
@@ -260,6 +260,7 @@ enum msm_pcie_res { 
	MSM_PCIE_RES_IO,

	MSM_PCIE_RES_BARS,

	MSM_PCIE_RES_TCSR,

	MSM_PCIE_RES_RUMI,

	MSM_PCIE_MAX_RES,

};
@@ -501,6 +502,7 @@ struct msm_pcie_dev_t { 
	void __iomem *conf;

	void __iomem *bars;

	void __iomem *tcsr;

	void __iomem *rumi;



	uint32_t axi_bar_start;

	uint32_t axi_bar_end;
@@ -603,6 +605,8 @@ struct msm_pcie_dev_t { 
	struct pinctrl_state *pins_default;

	struct pinctrl_state *pins_sleep;

	struct msm_pcie_device_info pcidev_table[MAX_DEVICE_NUM];



	void (*rumi_init)(struct msm_pcie_dev_t *pcie_dev);

};



struct msm_root_dev_t {
@@ -816,7 +820,8 @@ static const struct msm_pcie_res_info_t msm_pcie_res_info[MSM_PCIE_MAX_RES] = { 
	{"conf", NULL, NULL},

	{"io", NULL, NULL},

	{"bars", NULL, NULL},

	{"tcsr", NULL, NULL}

	{"tcsr", NULL, NULL},

	{"rumi", NULL, NULL}

};



/* irqs */
@@ -912,6 +917,35 @@ static inline void msm_pcie_config_clock_mem(struct msm_pcie_dev_t *dev, 
			dev->rc_idx, info->name);

}



static void msm_pcie_rumi_init(struct msm_pcie_dev_t *pcie_dev)

{

	u32 val;

	u32 reset_offs = 0x04;

	u32 phy_ctrl_offs = 0x40;



	PCIE_DBG(pcie_dev, "PCIe: RC%d: enter.\n", pcie_dev->rc_idx);



	val = readl_relaxed(pcie_dev->rumi + phy_ctrl_offs) | 0x1000;

	writel_relaxed(val, pcie_dev->rumi + phy_ctrl_offs);

	usleep_range(10000, 10001);



	writel_relaxed(0x800, pcie_dev->rumi + reset_offs);

	usleep_range(50000, 50001);

	writel_relaxed(0xFFFFFFFF, pcie_dev->rumi + reset_offs);

	usleep_range(50000, 50001);

	writel_relaxed(0x800, pcie_dev->rumi + reset_offs);

	usleep_range(50000, 50001);

	writel_relaxed(0, pcie_dev->rumi + reset_offs);

	usleep_range(50000, 50001);



	val = readl_relaxed(pcie_dev->rumi + phy_ctrl_offs) & 0xFFFFEFFF;

	writel_relaxed(val, pcie_dev->rumi + phy_ctrl_offs);

	usleep_range(10000, 10001);



	val = readl_relaxed(pcie_dev->rumi + phy_ctrl_offs) & 0xFFFFFFFE;

	writel_relaxed(val, pcie_dev->rumi + phy_ctrl_offs);

}



static void pcie_phy_dump(struct msm_pcie_dev_t *dev)

{

	int i, size;
@@ -3182,6 +3216,10 @@ static void msm_pcie_pipe_clk_deinit(struct msm_pcie_dev_t *dev) 


static bool pcie_phy_is_ready(struct msm_pcie_dev_t *dev)

{

	/* There is no PHY status check in RUMI */

	if (dev->rumi)

		return true;



	if (readl_relaxed(dev->phy + dev->phy_status_offset) & BIT(6))

		return false;

	else
@@ -3678,6 +3716,7 @@ static int msm_pcie_get_reg(struct msm_pcie_dev_t *pcie_dev) 
	pcie_dev->conf = pcie_dev->res[MSM_PCIE_RES_CONF].base;

	pcie_dev->bars = pcie_dev->res[MSM_PCIE_RES_BARS].base;

	pcie_dev->tcsr = pcie_dev->res[MSM_PCIE_RES_TCSR].base;

	pcie_dev->rumi = pcie_dev->res[MSM_PCIE_RES_RUMI].base;

	pcie_dev->dev_mem_res = pcie_dev->res[MSM_PCIE_RES_BARS].resource;

	pcie_dev->dev_io_res = pcie_dev->res[MSM_PCIE_RES_IO].resource;

	pcie_dev->dev_io_res->flags = IORESOURCE_IO;
@@ -3768,6 +3807,7 @@ static void msm_pcie_release_resources(struct msm_pcie_dev_t *dev) 
	dev->conf = NULL;

	dev->bars = NULL;

	dev->tcsr = NULL;

	dev->rumi = NULL;

	dev->dev_mem_res = NULL;

	dev->dev_io_res = NULL;

}
@@ -3879,6 +3919,10 @@ static int msm_pcie_enable(struct msm_pcie_dev_t *dev) 
	if (ret)

		goto clk_fail;



	/* RUMI PCIe reset sequence */

	if (dev->rumi_init)

		dev->rumi_init(dev);



	/* configure PCIe to RC mode */

	msm_pcie_write_reg(dev->parf, PCIE20_PARF_DEVICE_TYPE, 0x4);
@@ -5752,6 +5796,9 @@ static int msm_pcie_probe(struct platform_device *pdev) 
	if (ret)

		goto decrease_rc_num;



	if (pcie_dev->rumi)

		pcie_dev->rumi_init = msm_pcie_rumi_init;



	pcie_dev->pinctrl = devm_pinctrl_get(&pdev->dev);

	if (IS_ERR_OR_NULL(pcie_dev->pinctrl))

		PCIE_ERR(pcie_dev, "PCIe: RC%d failed to get pinctrl\n",