Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 647a3fb2 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: rip out dri1 breadcrumb updates from gen5+ irq handlers



We never supported dri1 on gen5+.

VLV never had that code, so no need to remove it.

Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d56b2136
Loading
Loading
Loading
Loading
+0 −16
Original line number Diff line number Diff line
@@ -582,7 +582,6 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
	int ret = IRQ_NONE;
	u32 de_iir, gt_iir, de_ier, pch_iir, pm_iir;
	struct drm_i915_master_private *master_priv;

	atomic_inc(&dev_priv->irq_received);

@@ -601,13 +600,6 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)

	ret = IRQ_HANDLED;

	if (dev->primary->master) {
		master_priv = dev->primary->master->driver_priv;
		if (master_priv->sarea_priv)
			master_priv->sarea_priv->last_dispatch =
				READ_BREADCRUMB(dev_priv);
	}

	snb_gt_irq_handler(dev, dev_priv, gt_iir);

	if (de_iir & DE_GSE_IVB)
@@ -669,7 +661,6 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
	int ret = IRQ_NONE;
	u32 de_iir, gt_iir, de_ier, pch_iir, pm_iir;
	u32 hotplug_mask;
	struct drm_i915_master_private *master_priv;

	atomic_inc(&dev_priv->irq_received);

@@ -694,13 +685,6 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)

	ret = IRQ_HANDLED;

	if (dev->primary->master) {
		master_priv = dev->primary->master->driver_priv;
		if (master_priv->sarea_priv)
			master_priv->sarea_priv->last_dispatch =
				READ_BREADCRUMB(dev_priv);
	}

	if (IS_GEN5(dev))
		ilk_gt_irq_handler(dev, dev_priv, gt_iir);
	else