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Commit 6474de5f authored by Kazuya Mizuguchi's avatar Kazuya Mizuguchi Committed by David S. Miller
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ravb: clear RIC1 in init instead of stop



AVB-DMAC Receive FIFO Warning interrupt is not enabled, so it is not
necessary to disable the interrupt in ravb_close().
On the other hand, this patch disables the interrupt in ravb_dmac_init() to
prevent the possibility that the interrupt is issued by the state that
a boot loader left.

Signed-off-by: default avatarKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3fa4cc9c
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+3 −2
Original line number Diff line number Diff line
@@ -410,9 +410,11 @@ static int ravb_dmac_init(struct net_device *ndev)
	/* Timestamp enable */
	ravb_write(ndev, TCCR_TFEN, TCCR);

	/* Interrupt enable: */
	/* Interrupt init: */
	/* Frame receive */
	ravb_write(ndev, RIC0_FRE0 | RIC0_FRE1, RIC0);
	/* Disable FIFO full warning */
	ravb_write(ndev, 0, RIC1);
	/* Receive FIFO full error, descriptor empty */
	ravb_write(ndev, RIC2_QFE0 | RIC2_QFE1 | RIC2_RFFE, RIC2);
	/* Frame transmitted, timestamp FIFO updated */
@@ -1478,7 +1480,6 @@ static int ravb_close(struct net_device *ndev)

	/* Disable interrupts by clearing the interrupt masks. */
	ravb_write(ndev, 0, RIC0);
	ravb_write(ndev, 0, RIC1);
	ravb_write(ndev, 0, RIC2);
	ravb_write(ndev, 0, TIC);