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Commit 63c3194b authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
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ASoC: tlv320aic3x: Mark the RESET register as volatile 



The RESET register only have one self clearing bit and it should not be
cached. If it is cached, when we sync the registers back to the chip we
will initiate a software reset as well, which is not desirable.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: default avatarJarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a5de5b74

sound/soc/codecs/tlv320aic3x.c

+13 −0
Original line number Diff line number Diff line
@@ -126,6 +126,16 @@ static const struct reg_default aic3x_reg[] = { 
	{ 108, 0x00 }, { 109, 0x00 },

};



static bool aic3x_volatile_reg(struct device *dev, unsigned int reg)

{

	switch (reg) {

	case AIC3X_RESET:

		return true;

	default:

		return false;

	}

}



static const struct regmap_config aic3x_regmap = {

	.reg_bits = 8,

	.val_bits = 8,
@@ -133,6 +143,9 @@ static const struct regmap_config aic3x_regmap = { 
	.max_register = DAC_ICC_ADJ,

	.reg_defaults = aic3x_reg,

	.num_reg_defaults = ARRAY_SIZE(aic3x_reg),



	.volatile_reg = aic3x_volatile_reg,



	.cache_type = REGCACHE_RBTREE,

};