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Commit 63aaf7ab authored by Harshitha Sai Neelati's avatar Harshitha Sai Neelati
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ARM: dts: msm: Add apb_pclk to GPU clock list for Bengal 

KGSL needs to enable apb_pclk for QDSS register access.
Hence add apb_pclk to the GPU clock list for Bengal.

Change-Id: I26eb27340b845e0ff4df4032acb65a657668b18e
parent 0ec154a0

qcom/bengal-gpu.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -126,11 +126,12 @@ 
			<&gpucc GPU_CC_AHB_CLK>,

			<&gcc GCC_GPU_MEMNOC_GFX_CLK>,

			<&gpucc GPU_CC_CX_GMU_CLK>,

			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;

			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,

			<&rpmcc RPM_SMD_QDSS_CLK>;



		clock-names = "core_clk", "rbbmtimer_clk", "iface_clk",

				"ahb_clk", "mem_clk", "gmu_clk",

				"smmu_vote";

				"smmu_vote", "apb_pclk";



		/* Bus Scale Settings */

		qcom,gpubw-dev = <&gpubw>;