Commit 639f1e04 authored Jan 15, 2021 by Martin Kaiser Committed by Greg Kroah-Hartman Mar 17, 2021

PCI: xgene-msi: Fix race in installing chained irq handler

[ Upstream commit a93c00e5f975f23592895b7e83f35de2d36b7633 ]

Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().

See also 2cf5a03c ("PCI/keystone: Fix race in installing chained IRQ
handler").

Based on the mail discussion, it seems ok to drop the error handling.

Link: https://lore.kernel.org/r/20210115212435.19940-3-martin@kaiser.cx


Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent a882f473

drivers/pci/controller/pci-xgene-msi.c

+3 −7

Original line number	Diff line number	Diff line
		@@ -384,13 +384,9 @@ static int xgene_msi_hwirq_alloc(unsigned int cpu)
		if (!msi_group->gic_irq)
		continue;

		irq_set_chained_handler(msi_group->gic_irq,
		xgene_msi_isr);
		err = irq_set_handler_data(msi_group->gic_irq, msi_group);
		if (err) {
		pr_err("failed to register GIC IRQ handler\n");
		return -EINVAL;
		}
		irq_set_chained_handler_and_data(msi_group->gic_irq,
		xgene_msi_isr, msi_group);

		/*
		* Statically allocate MSI GIC IRQs to each CPU core.
		* With 8-core X-Gene v1, 2 MSI GIC IRQs are allocated