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Commit 633d006e authored by Pavel Roskin's avatar Pavel Roskin Committed by John W. Linville
Browse files

ath5k: use parentheses around macro definitions

parent 2753f87a
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+1 −1
Original line number Diff line number Diff line
@@ -1977,7 +1977,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
	hw_tsf = ath5k_hw_get_tsf64(ah);
	hw_tu = TSF_TO_TU(hw_tsf);

#define FUDGE AR5K_TUNE_SW_BEACON_RESP + 3
#define FUDGE (AR5K_TUNE_SW_BEACON_RESP + 3)
	/* We use FUDGE to make sure the next TBTT is ahead of the current TU.
	 * Since we later subtract AR5K_TUNE_SW_BEACON_RESP (10) in the timer
	 * configuration we need to make sure it is bigger than that. */
+7 −6
Original line number Diff line number Diff line
@@ -2259,12 +2259,13 @@
#define	AR5K_PHY_FRAME_CTL_ILLLEN_ERR	0x08000000	/* Illegal length */
#define	AR5K_PHY_FRAME_CTL_SERVICE_ERR	0x20000000
#define	AR5K_PHY_FRAME_CTL_TXURN_ERR	0x40000000	/* TX underrun */
#define AR5K_PHY_FRAME_CTL_INI		AR5K_PHY_FRAME_CTL_SERVICE_ERR | \
#define AR5K_PHY_FRAME_CTL_INI	\
			(AR5K_PHY_FRAME_CTL_SERVICE_ERR | \
			 AR5K_PHY_FRAME_CTL_TXURN_ERR | \
			 AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \
			 AR5K_PHY_FRAME_CTL_ILLRATE_ERR | \
			 AR5K_PHY_FRAME_CTL_PARITY_ERR | \
			AR5K_PHY_FRAME_CTL_TIMING_ERR
			 AR5K_PHY_FRAME_CTL_TIMING_ERR)

/*
 * PHY Tx Power adjustment register [5212A+]