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Unverified Commit 6312455a authored by Matt Redfearn's avatar Matt Redfearn Committed by Paul Burton
Browse files

MIPS: memset.S: Add comments to fault fixup handlers 



It is not immediately obvious what the expected inputs to these fault
handlers is and how they calculate the number of unset bytes. Having
stared deeply at this in order to fix some corner cases, add some
comments to assist those who follow.

Signed-off-by: default avatarMatt Redfearn <matt.redfearn@mips.com>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19339/
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>
Cc: <linux-kernel@vger.kernel.org>
parent b1c03f1e

arch/mips/lib/memset.S

+18 −0
Original line number Diff line number Diff line
@@ -232,16 +232,25 @@ 


#ifdef CONFIG_CPU_MIPSR6

.Lbyte_fixup\@:

	/*

	 * unset_bytes = (#bytes - (#unaligned bytes)) - (-#unaligned bytes remaining + 1) + 1

	 *      a2     =             a2                -              t0                   + 1

	 */

	PTR_SUBU	a2, t0

	jr		ra

	 PTR_ADDIU	a2, 1

#endif /* CONFIG_CPU_MIPSR6 */



.Lfirst_fixup\@:

	/* unset_bytes already in a2 */

	jr	ra

	 nop



.Lfwd_fixup\@:

	/*

	 * unset_bytes = partial_start_addr +  #bytes   -     fault_addr

	 *      a2     =         t1         + (a2 & 3f) - $28->task->BUADDR

	 */

	PTR_L		t0, TI_TASK($28)

	andi		a2, 0x3f

	LONG_L		t0, THREAD_BUADDR(t0)
@@ -250,6 +259,10 @@ 
	 LONG_SUBU	a2, t0



.Lpartial_fixup\@:

	/*

	 * unset_bytes = partial_end_addr +      #bytes     -     fault_addr

	 *      a2     =       a0         + (a2 & STORMASK) - $28->task->BUADDR

	 */

	PTR_L		t0, TI_TASK($28)

	andi		a2, STORMASK

	LONG_L		t0, THREAD_BUADDR(t0)
@@ -258,10 +271,15 @@ 
	 LONG_SUBU	a2, t0



.Llast_fixup\@:

	/* unset_bytes already in a2 */

	jr		ra

	 nop



.Lsmall_fixup\@:

	/*

	 * unset_bytes = end_addr - current_addr + 1

	 *      a2     =    t1    -      a0      + 1

	 */

	PTR_SUBU	a2, t1, a0

	jr		ra

	 PTR_ADDIU	a2, 1