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Commit 62b6e9ff authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Export except_vec_vi_{mori,lui,ori} as text symbols.
  [MIPS] mips-boards: More liberal check for mips-board console
  [MIPS] Misc fixes for plat_irq_dispatch functions
  [MIPS] Qemu: Fix Symmetric Uniprocessor support.
  [MIPS] VI: TRACE_IRQS_OFF clobbers $v0, so save & restore around call.
parents 8718d75e 7df42461

arch/mips/Kconfig

+12 −3
Original line number Diff line number Diff line
@@ -542,6 +542,8 @@ config QEMU 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select ARCH_SPARSEMEM_ENABLE

	select GENERIC_HARDIRQS_NO__DO_IRQ

	select NR_CPUS_DEFAULT_1

	select SYS_SUPPORTS_SMP

	help

	  Qemu is a software emulator which among other architectures also

	  can simulate a MIPS32 4Kc system.  This patch adds support for the
@@ -1805,6 +1807,9 @@ config SMP 
config SYS_SUPPORTS_SMP

	bool



config NR_CPUS_DEFAULT_1

	bool



config NR_CPUS_DEFAULT_2

	bool
@@ -1825,8 +1830,9 @@ config NR_CPUS_DEFAULT_64 


config NR_CPUS

	int "Maximum number of CPUs (2-64)"

	range 2 64

	range 1 64 if NR_CPUS_DEFAULT_1

	depends on SMP

	default "1" if NR_CPUS_DEFAULT_1

	default "2" if NR_CPUS_DEFAULT_2

	default "4" if NR_CPUS_DEFAULT_4

	default "8" if NR_CPUS_DEFAULT_8
@@ -1837,10 +1843,13 @@ config NR_CPUS 
	  This allows you to specify the maximum number of CPUs which this

	  kernel will support.  The maximum supported value is 32 for 32-bit

	  kernel and 64 for 64-bit kernels; the minimum value which makes

	  sense is 2.

	  sense is 1 for Qemu (useful only for kernel debugging purposes)

	  and 2 for all others.



	  This is purely to save memory - each supported CPU adds

	  approximately eight kilobytes to the kernel image.

	  approximately eight kilobytes to the kernel image.  For best

	  performance should round up your number of processors to the next

	  power of two.



#

# Timer Interrupt Frequency Configuration

arch/mips/ddb5xxx/ddb5477/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -194,7 +194,7 @@ static void vrc5477_irq_dispatch(void) 


asmlinkage void plat_irq_dispatch(void)

{

	unsigned int pending = read_c0_cause() & read_c0_status();

	unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;



	if (pending & STATUSF_IP7)

		do_IRQ(CPU_IRQ_BASE + 7);

arch/mips/emma2rh/markeins/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -115,7 +115,7 @@ void __init arch_init_irq(void) 


asmlinkage void plat_irq_dispatch(void)

{

        unsigned int pending = read_c0_status() & read_c0_cause();

        unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;



	if (pending & STATUSF_IP7)

		do_IRQ(CPU_IRQ_BASE + 7);

arch/mips/gt64120/ev64120/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ 


asmlinkage void plat_irq_dispatch(void)

{

	unsigned int pending = read_c0_status() & read_c0_cause();

	unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;



	if (pending & STATUSF_IP4)		/* int2 hardware line (timer) */

		do_IRQ(4);

arch/mips/gt64120/wrppmc/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 


asmlinkage void plat_irq_dispatch(void)

{

	unsigned int pending = read_c0_status() & read_c0_cause();

	unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;



	if (pending & STATUSF_IP7)

		do_IRQ(WRPPMC_MIPS_TIMER_IRQ);	/* CPU Compare/Count internal timer */