Commit 620879c9 authored Feb 05, 2007 by Catalin Marinas Committed by Russell King Feb 08, 2007

[ARM] 4127/1: Flush the prefetch buffer after changing the DACR



The ARM Architecture Reference Manual specifies that a prefetch flush
is needed after changing the DACR register (chapter B2.7.6).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent dcda7e4b

include/asm-arm/domain.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -57,6 +57,7 @@
		__asm__ __volatile__( \
		"mcr p15, 0, %0, c3, c0 @ set domain" \
		: : "r" (x)); \
		isb(); \
		} while (0)

		#define modify_domain(dom,type) \