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Commit 60eb8eff authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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dt-bindings: arm: tegra: Document #reset-cells property of the Tegra20 MC 



Memory Controller has a memory client "hot reset" functionality, which
resets the DMA interface of a memory client, so MC is a reset controller.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent ca545e6c

Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt

+11 −1
Original line number Diff line number Diff line
@@ -6,11 +6,21 @@ Required properties: 
  example below. Note that the MC registers are interleaved with the

  GART registers, and hence must be represented as multiple ranges.

- interrupts : Should contain MC General interrupt.

- #reset-cells : Should be 1. This cell represents memory client module ID.

  The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>

  or in the TRM documentation.



Example:

	memory-controller@7000f000 {

	mc: memory-controller@7000f000 {

		compatible = "nvidia,tegra20-mc";

		reg = <0x7000f000 0x024

		       0x7000f03c 0x3c4>;

		interrupts = <0 77 0x04>;

		#reset-cells = <1>;

	};



	video-codec@6001a000 {

		compatible = "nvidia,tegra20-vde";

		...

		resets = <&mc TEGRA20_MC_RESET_VDE>;

	};