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Commit 60cdc1a0 authored by Ghanim Fodi's avatar Ghanim Fodi Committed by Gerrit - the friendly Code Review server
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msm: ipa: configure IPA pipes and group resources for Kona 



Kona uses different IPA pipes mapping and group resources
configuration. This change make these configurations.

Change-Id: I943b08a403dea9b8029f72659ab6c641fca95100
Signed-off-by: default avatarGhanim Fodi <gfodi@codeaurora.org>
parent 2610fe86

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

+210 −19
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ enum ipa_rsrc_grp_type_src { 
	IPA_v3_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS,

	IPA_v3_0_RSRC_GRP_TYPE_SRC_HDR_SECTORS,

	IPA_v3_0_RSRC_GRP_TYPE_SRC_HDRI1_BUFFER,

	IPA_v3_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS,

	IPA_v3_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS,

	IPA_v3_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF,

	IPA_v3_0_RSRC_GRP_TYPE_SRC_HDRI2_BUFFERS,

	IPA_v3_0_RSRC_GRP_TYPE_SRC_HPS_DMARS,
@@ -190,14 +190,14 @@ enum ipa_rsrc_grp_type_src { 
	IPA_v3_0_RSRC_GRP_TYPE_SRC_MAX,



	IPA_v3_5_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS = 0,

	IPA_v3_5_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS,

	IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS,

	IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF,

	IPA_v3_5_RSRC_GRP_TYPE_SRC_HPS_DMARS,

	IPA_v3_5_RSRC_GRP_TYPE_SRC_ACK_ENTRIES,

	IPA_v3_5_RSRC_GRP_TYPE_SRC_MAX,



	IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS = 0,

	IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS,

	IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS,

	IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF,

	IPA_v4_0_RSRC_GRP_TYPE_SRC_HPS_DMARS,

	IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES,
@@ -263,7 +263,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		{0, 255}, {0, 255}, {0, 255}, {0, 255}, {0, 255}, {0, 255} },

		[IPA_v3_0_RSRC_GRP_TYPE_SRC_HDRI1_BUFFER] = {

		{0, 255}, {0, 255}, {0, 255}, {0, 255}, {0, 255}, {0, 255} },

		[IPA_v3_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v3_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{14, 14}, {16, 16}, {5, 5}, {5, 5},  {0, 0}, {8, 8} },

		[IPA_v3_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{19, 19}, {26, 26}, {3, 3}, {7, 7}, {0, 0}, {8, 8} },
@@ -278,7 +278,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* LWA_DL  UL_DL    unused  UC_RX_Q, other are invalid */

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{0, 0}, {1, 255}, {0, 0}, {1, 255}, {0, 0}, {0, 0} },

		[IPA_v3_5_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{0, 0}, {10, 10}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{0, 0}, {14, 14}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },
@@ -291,7 +291,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* PCIE  DDR     DMA  unused, other are invalid */

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{4, 4}, {5, 5}, {1, 1}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v3_5_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{10, 10}, {10, 10}, {8, 8}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{12, 12}, {12, 12}, {8, 8}, {0, 0}, {0, 0}, {0, 0} },
@@ -304,7 +304,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* LWA_DL  UL_DL    unused  UC_RX_Q, other are invalid */

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{1, 255}, {1, 255}, {0, 0}, {1, 255}, {0, 0}, {0, 0} },

		[IPA_v3_5_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{10, 10}, {10, 10}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },

		[IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{12, 12}, {14, 14}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },
@@ -317,7 +317,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* LWA_DL  UL_DL    unused  UC_RX_Q, other are invalid */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{1, 255}, {1, 255}, {0, 0}, {1, 255}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{10, 10}, {10, 10}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{12, 12}, {14, 14}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },
@@ -330,7 +330,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* PCIE  DDR     DMA  unused, other are invalid */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{4, 4}, {5, 5}, {1, 1}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{10, 10}, {10, 10}, {8, 8}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{12, 12}, {12, 12}, {8, 8}, {0, 0}, {0, 0}, {0, 0} },
@@ -343,7 +343,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* LWA_DL  UL_DL    unused  UC_RX_Q, other are invalid */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{1, 63}, {1, 63}, {0, 0}, {1, 63}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{10, 10}, {10, 10}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{12, 12}, {14, 14}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },
@@ -356,7 +356,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* UL_DL   other are invalid */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{3, 63}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{3, 3}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{10, 10}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },
@@ -369,7 +369,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* unused  UL_DL_SRC  unused  unused  UC_RX_Q N/A */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{0, 0}, {1, 63}, {0, 0}, {0, 0}, {1, 63}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{0, 0}, {14, 14}, {0, 0}, {0, 0}, {3, 3}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{0, 0}, {18, 18}, {0, 0}, {0, 0}, {8, 8}, {0, 0} },
@@ -382,7 +382,7 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		/* PCIE  DDR  DMA  QDSS  unused  N/A  N/A */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{3, 8}, {4, 11}, {1, 1}, {1, 1}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{9, 9}, {12, 12}, {2, 2}, {2, 2}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{9, 9}, {14, 14}, {4, 4}, {4, 4}, {0, 0}, {0, 0} },
@@ -391,6 +391,19 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config 
		[IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = {

		{22, 22}, {16, 16}, {6, 6}, {2, 2}, {0, 0}, {0, 0} },

	},

	[IPA_4_5_APQ] = {

		/* unused  UL_DL_SRC  unused  unused  UC_RX_Q N/A */

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {

		{0, 0}, {1, 63}, {0, 0}, {0, 0}, {1, 63}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_LISTS] = {

		{0, 0}, {14, 14}, {0, 0}, {0, 0}, {3, 3}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {

		{0, 0}, {18, 18}, {0, 0}, {0, 0}, {8, 8}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_HPS_DMARS] = {

		{0, 0}, {0, 63}, {0, 0}, {0, 0},  {0, 63}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = {

		{0, 0}, {24, 24}, {0, 0}, {0, 0}, {8, 8}, {0, 0} },

	},

};



static const struct rsrc_min_max ipa3_rsrc_dst_grp_config
@@ -467,6 +480,13 @@ static const struct rsrc_min_max ipa3_rsrc_dst_grp_config 
		[IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = {

		{2, 63}, {1, 63}, {1, 2}, {1, 2}, {0, 2}, {0, 0} },

	},

	[IPA_4_5_APQ] = {

		/* UL/DL/DPL_DST unused unused unused uC N/A */

		[IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {

		{16, 16}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = {

		{2, 63}, {0, 0}, {0, 0}, {0, 0}, {0, 2}, {0, 0} },

	},

};



static const struct rsrc_min_max ipa3_rsrc_rx_grp_config
@@ -521,7 +541,11 @@ static const struct rsrc_min_max ipa3_rsrc_rx_grp_config 
		[IPA_RSRC_GRP_TYPE_RX_HPS_CMDQ] = {

		{3, 3}, {3, 3}, {3, 3}, {3, 3}, {0, 0}, {0, 0} },

	},



	[IPA_4_5_APQ] = {

		/* unused  UL_DL  unused unused  UC_RX_Q  N/A */

		[IPA_RSRC_GRP_TYPE_RX_HPS_CMDQ] = {

		{0, 0}, {3, 3}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

	},

};



static const u32 ipa3_rsrc_rx_grp_hps_weight_config
@@ -597,6 +621,8 @@ static const struct ipa_qmb_outstanding ipa3_qmb_outstanding 
	[IPA_4_5][IPA_QMB_INSTANCE_PCIE]	= {12, 8},

	[IPA_4_5_MHI][IPA_QMB_INSTANCE_DDR]	= {16, 8},

	[IPA_4_5_MHI][IPA_QMB_INSTANCE_PCIE]	= {12, 8},

	[IPA_4_5_APQ][IPA_QMB_INSTANCE_DDR]	= {16, 8},

	[IPA_4_5_APQ][IPA_QMB_INSTANCE_PCIE]	= {12, 8},

};



struct ipa_ep_configuration {
@@ -2380,6 +2406,169 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 31, 31, 8, 8, IPA_EE_AP } },



	/* IPA_4_5 APQ */

	[IPA_4_5_APQ][IPA_CLIENT_WLAN1_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 9, 3, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_WIGIG_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 1, 1, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_USB_PROD]            = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 0, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_APQ][IPA_CLIENT_APPS_LAN_PROD]	  = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			false,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 11, 4, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_APQ][IPA_CLIENT_APPS_CMD_PROD]	  = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			false,

			IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,

			QMB_MASTER_SELECT_DDR,

			{ 7, 12, 20, 24, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	/* Only for test purpose */

	[IPA_4_5_APQ][IPA_CLIENT_TEST_PROD]           = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 0, 8, 16, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST1_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 0, 8, 16, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST2_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 1, 1, 8, 16, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST3_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 9, 3, 8, 16, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST4_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL_SRC,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 10, 10, 8, 16, IPA_EE_AP } },



	[IPA_4_5_APQ][IPA_CLIENT_WLAN1_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 23, 8, 8, 13, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_WIGIG1_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 14, 14, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_WIGIG2_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 20, 18, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_WIGIG3_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 22, 5, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_WIGIG4_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 29, 10, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_USB_CONS]            = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 24, 9, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_APQ][IPA_CLIENT_USB_DPL_CONS]        = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 16, 16, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_APQ][IPA_CLIENT_APPS_LAN_CONS]       = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 13, 13, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_APQ][IPA_CLIENT_APPS_WAN_CONS]       = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 15, 15, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_APQ][IPA_CLIENT_ODL_DPL_CONS]       = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 21, 19, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	/* Only for test purpose */

	/* MBIM aggregation test pipes should have the same QMB as USB_CONS */

	[IPA_4_5_APQ][IPA_CLIENT_TEST_CONS]           = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 16, 16, 5, 5, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST1_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 16, 16, 5, 5, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST2_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 22, 5, 9, 9, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST3_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 24, 9, 9, 9, IPA_EE_AP } },

	[IPA_4_5_APQ][IPA_CLIENT_TEST4_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 23, 8, 8, 13, IPA_EE_AP } },

	/* Dummy consumer (pipe 31) is used in L2TP rt rule */

	[IPA_4_5_APQ][IPA_CLIENT_DUMMY_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL_DST,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 31, 31, 8, 8, IPA_EE_AP } },

};



static struct ipa3_mem_partition ipa_4_1_mem_part = {
@@ -6386,6 +6575,7 @@ static void ipa3_write_rsrc_grp_type_reg(int group_index, 
		break;

	case IPA_4_5:

	case IPA_4_5_MHI:

	case IPA_4_5_APQ:

		if (src) {

			switch (group_index) {

			case IPA_v4_5_MHI_GROUP_PCIE:
@@ -6584,6 +6774,7 @@ void ipa3_set_resorce_groups_min_max_limits(void) 
		break;

	case IPA_4_5:

	case IPA_4_5_MHI:

	case IPA_4_5_APQ:

		src_rsrc_type_max = IPA_v4_0_RSRC_GRP_TYPE_SRC_MAX;

		dst_rsrc_type_max = IPA_v4_0_RSRC_GRP_TYPE_DST_MAX;

		src_grp_idx_max = IPA_v4_5_SRC_GROUP_MAX;

include/uapi/linux/msm_ipa.h

+18 −1
Original line number Diff line number Diff line
@@ -329,9 +329,21 @@ enum ipa_client_type { 


	IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD	= 84,

	IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS	= 85,



	IPA_CLIENT_WIGIG_PROD			= 86,

	IPA_CLIENT_WIGIG1_CONS			= 87,



	/* RESERVERD PROD			= 88, */

	IPA_CLIENT_WIGIG2_CONS			= 89,



	/* RESERVERD PROD			= 90, */

	IPA_CLIENT_WIGIG3_CONS			= 91,



	/* RESERVERD PROD			= 92, */

	IPA_CLIENT_WIGIG4_CONS			= 93,

};



#define IPA_CLIENT_MAX (IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS + 1)

#define IPA_CLIENT_MAX (IPA_CLIENT_WIGIG4_CONS + 1)



#define IPA_CLIENT_Q6_DL_NLO_DATA_PROD IPA_CLIENT_Q6_DL_NLO_DATA_PROD

#define IPA_CLIENT_Q6_UL_NLO_ACK_CONS IPA_CLIENT_Q6_UL_NLO_ACK_CONS
@@ -339,6 +351,11 @@ enum ipa_client_type { 
#define IPA_CLIENT_MHI_DPL_CONS IPA_CLIENT_MHI_DPL_CONS

#define IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD

#define IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS

#define IPA_CLIENT_WIGIG_PROD IPA_CLIENT_WIGIG_PROD

#define IPA_CLIENT_WIGIG1_CONS IPA_CLIENT_WIGIG1_CONS

#define IPA_CLIENT_WIGIG2_CONS IPA_CLIENT_WIGIG2_CONS

#define IPA_CLIENT_WIGIG3_CONS IPA_CLIENT_WIGIG3_CONS

#define IPA_CLIENT_WIGIG4_CONS IPA_CLIENT_WIGIG4_CONS



#define IPA_CLIENT_IS_APPS_CONS(client) \

	((client) == IPA_CLIENT_APPS_LAN_CONS || \