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Commit 60b00900 authored by Lingutla Chandrasekhar's avatar Lingutla Chandrasekhar
Browse files

ARM: dts: msm: Add capacity dmips and dpc values for Lagoon 

Add capacity dmips per khz and dynamic power coefficient values for
Lagoon, which are used in energy aware scheduler for task placement
decisions.

Change-Id: Ie30a15310774d7cf18c7bc8e8c2181c2755bbdae
parent 3534fd5b

qcom/lagoon.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_0>;

			L2_0: l2-cache {
@@ -69,6 +71,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_100>;

			L2_100: l2-cache {
@@ -98,6 +102,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x200>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_200>;

			L2_200: l2-cache {
@@ -127,6 +133,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x300>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_300>;

			L2_300: l2-cache {
@@ -157,6 +165,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x400>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_400>;

			L2_400: l2-cache {
@@ -186,6 +196,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x500>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_500>;

			L2_500: l2-cache {
@@ -215,6 +227,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x600>;

			enable-method = "psci";

			capacity-dmips-mhz = <1894>;

			dynamic-power-coefficient = <703>;

			cache-size = <0x10000>;

			next-level-cache = <&L2_600>;

			L2_600: l2-cache {
@@ -253,6 +267,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x700>;

			enable-method = "psci";

			capacity-dmips-mhz = <1894>;

			dynamic-power-coefficient = <703>;

			cache-size = <0x10000>;

			next-level-cache = <&L2_700>;

			L2_700: l2-cache {