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Commit 608b4214 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Michael Ellerman
Browse files

powerpc/64: Hard code cache geometry on POWER8 



All shipping firmware versions have it wrong in the device-tree

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 65e01f38

arch/powerpc/kernel/setup_64.c

+18 −2
Original line number Diff line number Diff line
@@ -472,10 +472,26 @@ static bool __init parse_cache_info(struct device_node *np, 


void __init initialize_cache_info(void)

{

	struct device_node *cpu, *l2, *l3 = NULL;

	struct device_node *cpu = NULL, *l2, *l3 = NULL;

	u32 pvr;



	DBG(" -> initialize_cache_info()\n");



	/*

	 * All shipping POWER8 machines have a firmware bug that

	 * puts incorrect information in the device-tree. This will

	 * be (hopefully) fixed for future chips but for now hard

	 * code the values if we are running on one of these

	 */

	pvr = PVR_VER(mfspr(SPRN_PVR));

	if (pvr == PVR_POWER8 || pvr == PVR_POWER8E ||

	    pvr == PVR_POWER8NVL) {

						/* size    lsize   blk  sets */

		init_cache_info(&ppc64_caches.l1i, 0x8000,   128,  128, 32);

		init_cache_info(&ppc64_caches.l1d, 0x10000,  128,  128, 64);

		init_cache_info(&ppc64_caches.l2,  0x80000,  128,  0,   512);

		init_cache_info(&ppc64_caches.l3,  0x800000, 128,  0,   8192);

	} else

		cpu = of_find_node_by_type(NULL, "cpu");



	/*