Loading drivers/gpu/msm/adreno_a6xx_snapshot.c +39 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,9 @@ #define A6XX_NUM_XIN_AXI_BLOCKS 5 #define A6XX_NUM_XIN_CORE_BLOCKS 4 /* Snapshot section size of each CP preemption record for A6XX */ #define A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES (64 * 1024) static const unsigned int a6xx_gras_cluster[] = { 0x8000, 0x8006, 0x8010, 0x8092, 0x8094, 0x809D, 0x80A0, 0x80A6, 0x80AF, 0x80F1, 0x8100, 0x8107, 0x8109, 0x8109, 0x8110, 0x8110, Loading Loading @@ -1720,6 +1723,32 @@ size_t a6xx_snapshot_isense_registers(struct kgsl_device *device, u8 *buf, return (count * 8) + sizeof(*header); } /* Snapshot the preemption related buffers */ static size_t snapshot_preemption_record(struct kgsl_device *device, u8 *buf, size_t remain, void *priv) { struct kgsl_memdesc *memdesc = priv; struct kgsl_snapshot_gpu_object_v2 *header = (struct kgsl_snapshot_gpu_object_v2 *)buf; u8 *ptr = buf + sizeof(*header); if (remain < (A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES + sizeof(*header))) { SNAPSHOT_ERR_NOMEM(device, "PREEMPTION RECORD"); return 0; } header->size = A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES >> 2; header->gpuaddr = memdesc->gpuaddr; header->ptbase = kgsl_mmu_pagetable_get_ttbr0(device->mmu.defaultpagetable); header->type = SNAPSHOT_GPU_OBJECT_GLOBAL; memcpy(ptr, memdesc->hostptr, A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES); return A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES + sizeof(*header); } /* * a6xx_snapshot() - A6XX GPU snapshot function * @adreno_dev: Device being snapshotted Loading @@ -1733,6 +1762,7 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); struct adreno_ringbuffer *rb; bool sptprac_on; unsigned int i, roq_size, ucode_dbg_size; Loading Loading @@ -1851,6 +1881,15 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, a6xx_snapshot_dbgahb_regs(device, snapshot); } /* Preemption record */ if (adreno_is_preemption_enabled(adreno_dev)) { FOR_EACH_RINGBUFFER(adreno_dev, rb, i) { kgsl_snapshot_add_section(device, KGSL_SNAPSHOT_SECTION_GPU_OBJECT_V2, snapshot, snapshot_preemption_record, &rb->preemption_desc); } } } static int _a6xx_crashdump_init_mvc(struct adreno_device *adreno_dev, Loading Loading
drivers/gpu/msm/adreno_a6xx_snapshot.c +39 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,9 @@ #define A6XX_NUM_XIN_AXI_BLOCKS 5 #define A6XX_NUM_XIN_CORE_BLOCKS 4 /* Snapshot section size of each CP preemption record for A6XX */ #define A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES (64 * 1024) static const unsigned int a6xx_gras_cluster[] = { 0x8000, 0x8006, 0x8010, 0x8092, 0x8094, 0x809D, 0x80A0, 0x80A6, 0x80AF, 0x80F1, 0x8100, 0x8107, 0x8109, 0x8109, 0x8110, 0x8110, Loading Loading @@ -1720,6 +1723,32 @@ size_t a6xx_snapshot_isense_registers(struct kgsl_device *device, u8 *buf, return (count * 8) + sizeof(*header); } /* Snapshot the preemption related buffers */ static size_t snapshot_preemption_record(struct kgsl_device *device, u8 *buf, size_t remain, void *priv) { struct kgsl_memdesc *memdesc = priv; struct kgsl_snapshot_gpu_object_v2 *header = (struct kgsl_snapshot_gpu_object_v2 *)buf; u8 *ptr = buf + sizeof(*header); if (remain < (A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES + sizeof(*header))) { SNAPSHOT_ERR_NOMEM(device, "PREEMPTION RECORD"); return 0; } header->size = A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES >> 2; header->gpuaddr = memdesc->gpuaddr; header->ptbase = kgsl_mmu_pagetable_get_ttbr0(device->mmu.defaultpagetable); header->type = SNAPSHOT_GPU_OBJECT_GLOBAL; memcpy(ptr, memdesc->hostptr, A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES); return A6XX_SNAPSHOT_CP_CTXRECORD_SIZE_IN_BYTES + sizeof(*header); } /* * a6xx_snapshot() - A6XX GPU snapshot function * @adreno_dev: Device being snapshotted Loading @@ -1733,6 +1762,7 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); struct adreno_ringbuffer *rb; bool sptprac_on; unsigned int i, roq_size, ucode_dbg_size; Loading Loading @@ -1851,6 +1881,15 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, a6xx_snapshot_dbgahb_regs(device, snapshot); } /* Preemption record */ if (adreno_is_preemption_enabled(adreno_dev)) { FOR_EACH_RINGBUFFER(adreno_dev, rb, i) { kgsl_snapshot_add_section(device, KGSL_SNAPSHOT_SECTION_GPU_OBJECT_V2, snapshot, snapshot_preemption_record, &rb->preemption_desc); } } } static int _a6xx_crashdump_init_mvc(struct adreno_device *adreno_dev, Loading