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Commit 5f7a6c4b authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom-scuba: Add support for USB BCR"

parents d1fb3fa3 031eedb3

drivers/clk/qcom/gcc-scuba.c

+5 −1
Original line number Diff line number Diff line
@@ -505,6 +505,7 @@ static struct clk_alpha_pll gpll11 = { 
	.vco_table = default_vco,

	.num_vco = ARRAY_SIZE(default_vco),

	.regs = clk_alpha_pll_regs_offset[CLK_ALPHA_PLL_TYPE_DEFAULT],

	.flags = SUPPORTS_DYNAMIC_UPDATE,

	.clkr = {

		.enable_reg = 0x79000,

		.enable_mask = BIT(11),
@@ -664,7 +665,7 @@ static struct clk_alpha_pll gpll7 = { 


/* 533.2MHz configuration */

static const struct alpha_pll_config gpll8_config = {

	.l = 0x29,

	.l = 0x1B,

	.alpha = 0x55555555,

	.alpha_hi = 0xC5,

	.alpha_en_mask = BIT(24),
@@ -3276,9 +3277,12 @@ static const struct qcom_reset_map gcc_scuba_resets[] = { 
	[GCC_MMSS_BCR] = { 0x17000 },

	[GCC_PDM_BCR] = { 0x20000 },

	[GCC_QUPV3_WRAPPER_0_BCR] = { 0x1f000 },

	[GCC_QUSB2PHY_PRIM_BCR] = { 0x1c000 },

	[GCC_SDCC1_BCR] = { 0x38000 },

	[GCC_SDCC2_BCR] = { 0x1e000 },

	[GCC_USB30_PRIM_BCR] = { 0x1a000 },

	[GCC_USB3_PHY_PRIM_SP0_BCR] = { 0x1b000 },

	[GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x1b008 },

	[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x1d000 },

	[GCC_VCODEC0_BCR] = { 0x58094 },

	[GCC_VENUS_BCR] = { 0x58078 },

include/dt-bindings/clock/qcom,gcc-scuba.h

+3 −0
Original line number Diff line number Diff line
@@ -171,5 +171,8 @@ 
#define GCC_VCODEC0_BCR					11

#define GCC_VENUS_BCR					12

#define GCC_VIDEO_INTERFACE_BCR				13

#define GCC_QUSB2PHY_PRIM_BCR				14

#define GCC_USB3_PHY_PRIM_SP0_BCR			15

#define GCC_USB3PHY_PHY_PRIM_SP0_BCR			16



#endif