Commit 5f59dde8 authored Apr 18, 2020 by Luke Nelson Committed by Greg Kroah-Hartman May 02, 2020

bpf, x86: Fix encoding for lower 8-bit registers in BPF_STX BPF_B



[ Upstream commit aee194b14dd2b2bde6252b3acf57d36dccfc743a ]

This patch fixes an encoding bug in emit_stx for BPF_B when the source
register is BPF_REG_FP.

The current implementation for BPF_STX BPF_B in emit_stx saves one REX
byte when the operands can be encoded using Mod-R/M alone. The lower 8
bits of registers %rax, %rbx, %rcx, and %rdx can be accessed without using
a REX prefix via %al, %bl, %cl, and %dl, respectively. Other registers,
(e.g., %rsi, %rdi, %rbp, %rsp) require a REX prefix to use their 8-bit
equivalents (%sil, %dil, %bpl, %spl).

The current code checks if the source for BPF_STX BPF_B is BPF_REG_1
or BPF_REG_2 (which map to %rdi and %rsi), in which case it emits the
required REX prefix. However, it misses the case when the source is
BPF_REG_FP (mapped to %rbp).

The result is that BPF_STX BPF_B with BPF_REG_FP as the source operand
will read from register %ch instead of the correct %bpl. This patch fixes
the problem by fixing and refactoring the check on which registers need
the extra REX byte. Since no BPF registers map to %rsp, there is no need
to handle %spl.

Fixes: 62258278 ("net: filter: x86: internal BPF JIT")
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20200418232655.23870-1-luke.r.nels@gmail.com


Signed-off-by: Sasha Levin <sashal@kernel.org>

parent aef81b0f

arch/x86/net/bpf_jit_comp.c

+15 −3

Original line number	Diff line number	Diff line
		@@ -142,6 +142,19 @@ static bool is_ereg(u32 reg)
		BIT(BPF_REG_AX));
		}

		/*
		* is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64
		* lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte
		* of encoding. al,cl,dl,bl have simpler encoding.
		*/
		static bool is_ereg_8l(u32 reg)
		{
		return is_ereg(reg) \|\|
		(1 << reg) & (BIT(BPF_REG_1) \|
		BIT(BPF_REG_2) \|
		BIT(BPF_REG_FP));
		}

		static bool is_axreg(u32 reg)
		{
		return reg == BPF_REG_0;
		@@ -751,9 +764,8 @@ st: if (is_imm8(insn->off))
		/* STX: (u8)(dst_reg + off) = src_reg */
		case BPF_STX \| BPF_MEM \| BPF_B:
		/* Emit 'mov byte ptr [rax + off], al' */
		if (is_ereg(dst_reg) \|\| is_ereg(src_reg) \|\|
		/* We have to add extra byte for x86 SIL, DIL regs */
		src_reg == BPF_REG_1 \|\| src_reg == BPF_REG_2)
		if (is_ereg(dst_reg) \|\| is_ereg_8l(src_reg))
		/* Add extra byte for eregs or SIL,DIL,BPL in src_reg */
		EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
		else
		EMIT1(0x88);