Loading drivers/char/adsprpc.c +28 −11 Original line number Diff line number Diff line Loading @@ -415,8 +415,8 @@ struct fastrpc_mmap { int uncached; int secure; uintptr_t attr; bool is_filemap; /* flag to indicate map used in process init */ bool is_filemap; /* flag to indicate map used in process init */ unsigned int ctx_refs; /* Indicates reference count for context map */ }; enum fastrpc_perfkeys { Loading Loading @@ -862,8 +862,9 @@ static int fastrpc_mmap_remove(struct fastrpc_file *fl, uintptr_t va, return 0; } hlist_for_each_entry_safe(map, n, &fl->maps, hn) { if (map->refs == 1 && map->raddr == va && map->raddr + map->len == va + len && /* Remove if only one reference map and no context map */ if (map->refs == 1 && !map->ctx_refs && map->raddr == va && map->raddr + map->len == va + len && /* Remove map if not used in process initialization */ !map->is_filemap) { match = map; Loading Loading @@ -903,14 +904,14 @@ static void fastrpc_mmap_free(struct fastrpc_mmap *map, uint32_t flags) map->flags == ADSP_MMAP_REMOTE_HEAP_ADDR) { spin_lock(&me->hlock); map->refs--; if (!map->refs) if (!map->refs && !map->ctx_refs) hlist_del_init(&map->hn); spin_unlock(&me->hlock); if (map->refs > 0) return; } else { map->refs--; if (!map->refs) if (!map->refs && !map->ctx_refs) hlist_del_init(&map->hn); if (map->refs > 0 && !flags) return; Loading Loading @@ -1008,6 +1009,7 @@ static int fastrpc_mmap_create(struct fastrpc_file *fl, int fd, map->fd = fd; map->attr = attr; map->is_filemap = false; map->ctx_refs = 0; if (mflags == ADSP_MMAP_HEAP_ADDR || mflags == ADSP_MMAP_REMOTE_HEAP_ADDR) { map->apps = me; Loading Loading @@ -1533,8 +1535,11 @@ static void context_free(struct smq_invoke_ctx *ctx) spin_unlock(&ctx->fl->hlock); mutex_lock(&ctx->fl->map_mutex); for (i = 0; i < nbufs; ++i) for (i = 0; i < nbufs; ++i) { if (ctx->maps[i] && ctx->maps[i]->ctx_refs) ctx->maps[i]->ctx_refs--; fastrpc_mmap_free(ctx->maps[i], 0); } mutex_unlock(&ctx->fl->map_mutex); fastrpc_buf_free(ctx->buf, 1); Loading Loading @@ -1757,6 +1762,8 @@ static int get_args(uint32_t kernel, struct smq_invoke_ctx *ctx) err = fastrpc_mmap_create(ctx->fl, ctx->fds[i], ctx->attrs[i], buf, len, mflags, &ctx->maps[i]); if (ctx->maps[i]) ctx->maps[i]->ctx_refs++; mutex_unlock(&ctx->fl->map_mutex); if (err) goto bail; Loading @@ -1774,9 +1781,14 @@ static int get_args(uint32_t kernel, struct smq_invoke_ctx *ctx) err = fastrpc_mmap_create(ctx->fl, ctx->fds[i], FASTRPC_ATTR_NOVA, 0, 0, dmaflags, &ctx->maps[i]); if (!err && ctx->maps[i]) ctx->maps[i]->ctx_refs++; if (err) { for (j = bufs; j < i; j++) for (j = bufs; j < i; j++) { if (ctx->maps[j] && ctx->maps[j]->ctx_refs) ctx->maps[j]->ctx_refs--; fastrpc_mmap_free(ctx->maps[j], 0); } mutex_unlock(&ctx->fl->map_mutex); goto bail; } Loading Loading @@ -2059,6 +2071,8 @@ static int put_args(uint32_t kernel, struct smq_invoke_ctx *ctx, goto bail; } else { mutex_lock(&ctx->fl->map_mutex); if (ctx->maps[i]->ctx_refs) ctx->maps[i]->ctx_refs--; fastrpc_mmap_free(ctx->maps[i], 0); mutex_unlock(&ctx->fl->map_mutex); ctx->maps[i] = NULL; Loading @@ -2070,10 +2084,13 @@ static int put_args(uint32_t kernel, struct smq_invoke_ctx *ctx, if (!fdlist[i]) break; if (!fastrpc_mmap_find(ctx->fl, (int)fdlist[i], 0, 0, 0, 0, &mmap)) 0, 0, &mmap)) { if (mmap && mmap->ctx_refs) mmap->ctx_refs--; fastrpc_mmap_free(mmap, 0); } } } mutex_unlock(&ctx->fl->map_mutex); if (ctx->crc && crclist && rpra) K_COPY_TO_USER(err, kernel, ctx->crc, Loading drivers/gpu/msm/adreno_a6xx_gmu.c +3 −10 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ /* soc/qcom/cmd-db.h needs types.h */ Loading Loading @@ -388,19 +389,11 @@ static int a6xx_gmu_start(struct kgsl_device *device) gmu_core_regwrite(device, A6XX_GMU_CM3_SYSRESET, 0); /* Make sure the request completes before continuing */ wmb(); if (timed_poll_check(device, A6XX_GMU_CM3_FW_INIT_RESULT, val, GMU_START_TIMEOUT, mask)) { u32 val; /* * The breadcrumb is written to a gmu virtual mapping * which points to dtcm byte offset 0x3fdc. */ gmu_core_regread(device, A6XX_GMU_CM3_DTCM_START + (0x3fdc >> 2), &val); dev_err(&gmu->pdev->dev, "GMU doesn't boot: 0x%x\n", val); dev_err(&gmu->pdev->dev, "GMU doesn't boot\n"); return -ETIMEDOUT; } Loading drivers/soc/qcom/socinfo.c +150 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2009-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #define pr_fmt(fmt) "%s: " fmt, __func__ Loading Loading @@ -209,6 +210,14 @@ struct socinfo_v0_15 { uint32_t nmodem_supported; }; struct socinfo_v0_16 { struct socinfo_v0_15 v0_15; __le32 esku; __le32 nproduct_code; __le32 npartnamemap_offset; __le32 nnum_partname_mapping; }; static union { struct socinfo_v0_1 v0_1; struct socinfo_v0_2 v0_2; Loading @@ -225,10 +234,56 @@ static union { struct socinfo_v0_13 v0_13; struct socinfo_v0_14 v0_14; struct socinfo_v0_15 v0_15; struct socinfo_v0_16 v0_16; } *socinfo; /* max socinfo format version supported */ #define MAX_SOCINFO_FORMAT SOCINFO_VERSION(0, 15) #define MAX_SOCINFO_FORMAT SOCINFO_VERSION(0, 16) enum { /* External SKU */ SKU_UNKNOWN = 0x0, SKU_AA = 0x1, SKU_AB = 0x2, SKU_AC = 0x3, SKU_AD = 0x4, SKU_AE = 0x5, SKU_AF = 0x6, SKU_EXT_RESERVE, /* Internal SKU */ SKU_Y0 = 0xf1, SKU_Y1 = 0xf2, SKU_Y2 = 0xf3, SKU_Y3 = 0xf4, SKU_Y4 = 0xf5, SKU_Y5 = 0xf6, SKU_Y6 = 0xf7, SKU_Y7 = 0xf8, SKU_INT_RESERVE, }; static const char * const hw_platform_esku[] = { [SKU_UNKNOWN] = "Unknown", [SKU_AA] = "AA", [SKU_AB] = "AB", [SKU_AC] = "AC", [SKU_AD] = "AD", [SKU_AE] = "AE", [SKU_AF] = "AF", }; #define SKU_INT_MASK 0x0f static const char * const hw_platform_isku[] = { [SKU_Y0 & SKU_INT_MASK] = "Y0", [SKU_Y1 & SKU_INT_MASK] = "Y1", [SKU_Y2 & SKU_INT_MASK] = "Y2", [SKU_Y3 & SKU_INT_MASK] = "Y3", [SKU_Y4 & SKU_INT_MASK] = "Y4", [SKU_Y5 & SKU_INT_MASK] = "Y5", [SKU_Y6 & SKU_INT_MASK] = "Y6", [SKU_Y7 & SKU_INT_MASK] = "Y7", }; static struct msm_soc_info cpu_of_id[] = { [0] = {MSM_CPU_UNKNOWN, "Unknown CPU"}, Loading Loading @@ -408,6 +463,7 @@ static struct msm_soc_info cpu_of_id[] = { static enum msm_cpu cur_cpu; static int current_image; static uint32_t socinfo_format; static const char *sku; static struct socinfo_v0_1 dummy_socinfo = { .format = SOCINFO_VERSION(0, 1), Loading Loading @@ -657,6 +713,34 @@ static uint32_t socinfo_get_nmodem_supported(void) : 0; } static uint32_t socinfo_get_eskuid(void) { return socinfo ? (socinfo_format >= SOCINFO_VERSION(0, 16) ? le32_to_cpu(socinfo->v0_16.esku) : 0) : 0; } static const char *socinfo_get_esku_mapping(void) { uint32_t id = socinfo_get_eskuid(); if (id > SKU_UNKNOWN && id < SKU_EXT_RESERVE) return hw_platform_esku[id]; else if (id >= SKU_Y0 && id < SKU_INT_RESERVE) return hw_platform_isku[id & SKU_INT_MASK]; return NULL; } static uint32_t socinfo_get_nproduct_code(void) { return socinfo ? (socinfo_format >= SOCINFO_VERSION(0, 16) ? le32_to_cpu(socinfo->v0_16.nproduct_code) : 0) : 0; } enum pmic_model socinfo_get_pmic_model(void) { return socinfo ? Loading Loading @@ -988,6 +1072,26 @@ msm_get_nmodem_supported(struct device *dev, socinfo_get_nmodem_supported()); } static ssize_t msm_get_sku(struct device *dev, struct device_attribute *attr, char *buf) { return scnprintf(buf, PAGE_SIZE, "%s\n", sku ? sku : "Unknown"); } static ssize_t msm_get_esku(struct device *dev, struct device_attribute *attr, char *buf) { const char *esku = socinfo_get_esku_mapping(); return scnprintf(buf, PAGE_SIZE, "%s\n", esku ? esku : "Unknown"); } static ssize_t msm_get_pmic_model(struct device *dev, struct device_attribute *attr, Loading Loading @@ -1303,6 +1407,12 @@ static struct device_attribute msm_soc_attr_nmodem_supported = __ATTR(nmodem_supported, 0444, msm_get_nmodem_supported, NULL); static struct device_attribute msm_soc_attr_sku = __ATTR(sku, 0444, msm_get_sku, NULL); static struct device_attribute msm_soc_attr_esku = __ATTR(esku, 0444, msm_get_esku, NULL); static struct device_attribute msm_soc_attr_pmic_model = __ATTR(pmic_model, 0444, msm_get_pmic_model, NULL); Loading Loading @@ -1489,6 +1599,11 @@ static void __init populate_soc_sysfs_files(struct device *msm_soc_device) device_create_file(msm_soc_device, &images); switch (socinfo_format) { case SOCINFO_VERSION(0, 16): device_create_file(msm_soc_device, &msm_soc_attr_sku); device_create_file(msm_soc_device, &msm_soc_attr_esku); case SOCINFO_VERSION(0, 15): device_create_file(msm_soc_device, &msm_soc_attr_nmodem_supported); Loading Loading @@ -1787,6 +1902,31 @@ static void socinfo_print(void) socinfo->v0_15.nmodem_supported); break; case SOCINFO_VERSION(0, 16): pr_info("v%u.%u, id=%u, ver=%u.%u, raw_id=%u, raw_ver=%u, hw_plat=%u, hw_plat_ver=%u\n accessory_chip=%u, hw_plat_subtype=%u, pmic_model=%u, pmic_die_revision=%u foundry_id=%u serial_number=%u num_pmics=%u chip_family=0x%x raw_device_family=0x%x raw_device_number=0x%x nproduct_id=0x%x num_clusters=0x%x ncluster_array_offset=0x%x num_subset_parts=0x%x nsubset_parts_array_offset=0x%x nmodem_supported=0x%x sku=%s\n", f_maj, f_min, socinfo->v0_1.id, v_maj, v_min, socinfo->v0_2.raw_id, socinfo->v0_2.raw_version, socinfo->v0_3.hw_platform, socinfo->v0_4.platform_version, socinfo->v0_5.accessory_chip, socinfo->v0_6.hw_platform_subtype, socinfo->v0_7.pmic_model, socinfo->v0_7.pmic_die_revision, socinfo->v0_9.foundry_id, socinfo->v0_10.serial_number, socinfo->v0_11.num_pmics, socinfo->v0_12.chip_family, socinfo->v0_12.raw_device_family, socinfo->v0_12.raw_device_number, socinfo->v0_13.nproduct_id, socinfo->v0_14.num_clusters, socinfo->v0_14.ncluster_array_offset, socinfo->v0_14.num_subset_parts, socinfo->v0_14.nsubset_parts_array_offset, socinfo->v0_15.nmodem_supported, sku ? sku : "Unknown"); break; default: pr_err("Unknown format found: v%u.%u\n", f_maj, f_min); break; Loading Loading @@ -1819,6 +1959,7 @@ int __init socinfo_init(void) static bool socinfo_init_done; size_t size; uint32_t soc_info_id; const char *machine, *esku; if (socinfo_init_done) return 0; Loading @@ -1838,6 +1979,14 @@ int __init socinfo_init(void) (!cpu_of_id[soc_info_id].soc_id_string)) pr_warn("New IDs added! ID => CPU mapping needs an update.\n"); if (socinfo_format >= SOCINFO_VERSION(0, 16)) { machine = socinfo_get_id_string(); esku = socinfo_get_esku_mapping(); if (machine && esku) sku = kasprintf(GFP_KERNEL, "%s-%u-%s", machine, socinfo_get_nproduct_code(), esku); } cur_cpu = cpu_of_id[socinfo->v0_1.id].generic_soc_type; boot_stats_init(); socinfo_print(); Loading include/dt-bindings/clock/qcom,gcc-scuba.h +2 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_QCOM_GCC_SCUBA_H Loading Loading @@ -155,6 +156,7 @@ #define GCC_VIDEO_VENUS_CLK_SRC 145 #define GCC_VIDEO_VENUS_CTL_CLK 146 #define GCC_VIDEO_XO_CLK 147 #define GCC_PWM0_XO512_DIV_CLK_SRC 148 /* GCC resets */ #define GCC_CAMSS_OPE_BCR 0 Loading Loading
drivers/char/adsprpc.c +28 −11 Original line number Diff line number Diff line Loading @@ -415,8 +415,8 @@ struct fastrpc_mmap { int uncached; int secure; uintptr_t attr; bool is_filemap; /* flag to indicate map used in process init */ bool is_filemap; /* flag to indicate map used in process init */ unsigned int ctx_refs; /* Indicates reference count for context map */ }; enum fastrpc_perfkeys { Loading Loading @@ -862,8 +862,9 @@ static int fastrpc_mmap_remove(struct fastrpc_file *fl, uintptr_t va, return 0; } hlist_for_each_entry_safe(map, n, &fl->maps, hn) { if (map->refs == 1 && map->raddr == va && map->raddr + map->len == va + len && /* Remove if only one reference map and no context map */ if (map->refs == 1 && !map->ctx_refs && map->raddr == va && map->raddr + map->len == va + len && /* Remove map if not used in process initialization */ !map->is_filemap) { match = map; Loading Loading @@ -903,14 +904,14 @@ static void fastrpc_mmap_free(struct fastrpc_mmap *map, uint32_t flags) map->flags == ADSP_MMAP_REMOTE_HEAP_ADDR) { spin_lock(&me->hlock); map->refs--; if (!map->refs) if (!map->refs && !map->ctx_refs) hlist_del_init(&map->hn); spin_unlock(&me->hlock); if (map->refs > 0) return; } else { map->refs--; if (!map->refs) if (!map->refs && !map->ctx_refs) hlist_del_init(&map->hn); if (map->refs > 0 && !flags) return; Loading Loading @@ -1008,6 +1009,7 @@ static int fastrpc_mmap_create(struct fastrpc_file *fl, int fd, map->fd = fd; map->attr = attr; map->is_filemap = false; map->ctx_refs = 0; if (mflags == ADSP_MMAP_HEAP_ADDR || mflags == ADSP_MMAP_REMOTE_HEAP_ADDR) { map->apps = me; Loading Loading @@ -1533,8 +1535,11 @@ static void context_free(struct smq_invoke_ctx *ctx) spin_unlock(&ctx->fl->hlock); mutex_lock(&ctx->fl->map_mutex); for (i = 0; i < nbufs; ++i) for (i = 0; i < nbufs; ++i) { if (ctx->maps[i] && ctx->maps[i]->ctx_refs) ctx->maps[i]->ctx_refs--; fastrpc_mmap_free(ctx->maps[i], 0); } mutex_unlock(&ctx->fl->map_mutex); fastrpc_buf_free(ctx->buf, 1); Loading Loading @@ -1757,6 +1762,8 @@ static int get_args(uint32_t kernel, struct smq_invoke_ctx *ctx) err = fastrpc_mmap_create(ctx->fl, ctx->fds[i], ctx->attrs[i], buf, len, mflags, &ctx->maps[i]); if (ctx->maps[i]) ctx->maps[i]->ctx_refs++; mutex_unlock(&ctx->fl->map_mutex); if (err) goto bail; Loading @@ -1774,9 +1781,14 @@ static int get_args(uint32_t kernel, struct smq_invoke_ctx *ctx) err = fastrpc_mmap_create(ctx->fl, ctx->fds[i], FASTRPC_ATTR_NOVA, 0, 0, dmaflags, &ctx->maps[i]); if (!err && ctx->maps[i]) ctx->maps[i]->ctx_refs++; if (err) { for (j = bufs; j < i; j++) for (j = bufs; j < i; j++) { if (ctx->maps[j] && ctx->maps[j]->ctx_refs) ctx->maps[j]->ctx_refs--; fastrpc_mmap_free(ctx->maps[j], 0); } mutex_unlock(&ctx->fl->map_mutex); goto bail; } Loading Loading @@ -2059,6 +2071,8 @@ static int put_args(uint32_t kernel, struct smq_invoke_ctx *ctx, goto bail; } else { mutex_lock(&ctx->fl->map_mutex); if (ctx->maps[i]->ctx_refs) ctx->maps[i]->ctx_refs--; fastrpc_mmap_free(ctx->maps[i], 0); mutex_unlock(&ctx->fl->map_mutex); ctx->maps[i] = NULL; Loading @@ -2070,10 +2084,13 @@ static int put_args(uint32_t kernel, struct smq_invoke_ctx *ctx, if (!fdlist[i]) break; if (!fastrpc_mmap_find(ctx->fl, (int)fdlist[i], 0, 0, 0, 0, &mmap)) 0, 0, &mmap)) { if (mmap && mmap->ctx_refs) mmap->ctx_refs--; fastrpc_mmap_free(mmap, 0); } } } mutex_unlock(&ctx->fl->map_mutex); if (ctx->crc && crclist && rpra) K_COPY_TO_USER(err, kernel, ctx->crc, Loading
drivers/gpu/msm/adreno_a6xx_gmu.c +3 −10 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ /* soc/qcom/cmd-db.h needs types.h */ Loading Loading @@ -388,19 +389,11 @@ static int a6xx_gmu_start(struct kgsl_device *device) gmu_core_regwrite(device, A6XX_GMU_CM3_SYSRESET, 0); /* Make sure the request completes before continuing */ wmb(); if (timed_poll_check(device, A6XX_GMU_CM3_FW_INIT_RESULT, val, GMU_START_TIMEOUT, mask)) { u32 val; /* * The breadcrumb is written to a gmu virtual mapping * which points to dtcm byte offset 0x3fdc. */ gmu_core_regread(device, A6XX_GMU_CM3_DTCM_START + (0x3fdc >> 2), &val); dev_err(&gmu->pdev->dev, "GMU doesn't boot: 0x%x\n", val); dev_err(&gmu->pdev->dev, "GMU doesn't boot\n"); return -ETIMEDOUT; } Loading
drivers/soc/qcom/socinfo.c +150 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2009-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #define pr_fmt(fmt) "%s: " fmt, __func__ Loading Loading @@ -209,6 +210,14 @@ struct socinfo_v0_15 { uint32_t nmodem_supported; }; struct socinfo_v0_16 { struct socinfo_v0_15 v0_15; __le32 esku; __le32 nproduct_code; __le32 npartnamemap_offset; __le32 nnum_partname_mapping; }; static union { struct socinfo_v0_1 v0_1; struct socinfo_v0_2 v0_2; Loading @@ -225,10 +234,56 @@ static union { struct socinfo_v0_13 v0_13; struct socinfo_v0_14 v0_14; struct socinfo_v0_15 v0_15; struct socinfo_v0_16 v0_16; } *socinfo; /* max socinfo format version supported */ #define MAX_SOCINFO_FORMAT SOCINFO_VERSION(0, 15) #define MAX_SOCINFO_FORMAT SOCINFO_VERSION(0, 16) enum { /* External SKU */ SKU_UNKNOWN = 0x0, SKU_AA = 0x1, SKU_AB = 0x2, SKU_AC = 0x3, SKU_AD = 0x4, SKU_AE = 0x5, SKU_AF = 0x6, SKU_EXT_RESERVE, /* Internal SKU */ SKU_Y0 = 0xf1, SKU_Y1 = 0xf2, SKU_Y2 = 0xf3, SKU_Y3 = 0xf4, SKU_Y4 = 0xf5, SKU_Y5 = 0xf6, SKU_Y6 = 0xf7, SKU_Y7 = 0xf8, SKU_INT_RESERVE, }; static const char * const hw_platform_esku[] = { [SKU_UNKNOWN] = "Unknown", [SKU_AA] = "AA", [SKU_AB] = "AB", [SKU_AC] = "AC", [SKU_AD] = "AD", [SKU_AE] = "AE", [SKU_AF] = "AF", }; #define SKU_INT_MASK 0x0f static const char * const hw_platform_isku[] = { [SKU_Y0 & SKU_INT_MASK] = "Y0", [SKU_Y1 & SKU_INT_MASK] = "Y1", [SKU_Y2 & SKU_INT_MASK] = "Y2", [SKU_Y3 & SKU_INT_MASK] = "Y3", [SKU_Y4 & SKU_INT_MASK] = "Y4", [SKU_Y5 & SKU_INT_MASK] = "Y5", [SKU_Y6 & SKU_INT_MASK] = "Y6", [SKU_Y7 & SKU_INT_MASK] = "Y7", }; static struct msm_soc_info cpu_of_id[] = { [0] = {MSM_CPU_UNKNOWN, "Unknown CPU"}, Loading Loading @@ -408,6 +463,7 @@ static struct msm_soc_info cpu_of_id[] = { static enum msm_cpu cur_cpu; static int current_image; static uint32_t socinfo_format; static const char *sku; static struct socinfo_v0_1 dummy_socinfo = { .format = SOCINFO_VERSION(0, 1), Loading Loading @@ -657,6 +713,34 @@ static uint32_t socinfo_get_nmodem_supported(void) : 0; } static uint32_t socinfo_get_eskuid(void) { return socinfo ? (socinfo_format >= SOCINFO_VERSION(0, 16) ? le32_to_cpu(socinfo->v0_16.esku) : 0) : 0; } static const char *socinfo_get_esku_mapping(void) { uint32_t id = socinfo_get_eskuid(); if (id > SKU_UNKNOWN && id < SKU_EXT_RESERVE) return hw_platform_esku[id]; else if (id >= SKU_Y0 && id < SKU_INT_RESERVE) return hw_platform_isku[id & SKU_INT_MASK]; return NULL; } static uint32_t socinfo_get_nproduct_code(void) { return socinfo ? (socinfo_format >= SOCINFO_VERSION(0, 16) ? le32_to_cpu(socinfo->v0_16.nproduct_code) : 0) : 0; } enum pmic_model socinfo_get_pmic_model(void) { return socinfo ? Loading Loading @@ -988,6 +1072,26 @@ msm_get_nmodem_supported(struct device *dev, socinfo_get_nmodem_supported()); } static ssize_t msm_get_sku(struct device *dev, struct device_attribute *attr, char *buf) { return scnprintf(buf, PAGE_SIZE, "%s\n", sku ? sku : "Unknown"); } static ssize_t msm_get_esku(struct device *dev, struct device_attribute *attr, char *buf) { const char *esku = socinfo_get_esku_mapping(); return scnprintf(buf, PAGE_SIZE, "%s\n", esku ? esku : "Unknown"); } static ssize_t msm_get_pmic_model(struct device *dev, struct device_attribute *attr, Loading Loading @@ -1303,6 +1407,12 @@ static struct device_attribute msm_soc_attr_nmodem_supported = __ATTR(nmodem_supported, 0444, msm_get_nmodem_supported, NULL); static struct device_attribute msm_soc_attr_sku = __ATTR(sku, 0444, msm_get_sku, NULL); static struct device_attribute msm_soc_attr_esku = __ATTR(esku, 0444, msm_get_esku, NULL); static struct device_attribute msm_soc_attr_pmic_model = __ATTR(pmic_model, 0444, msm_get_pmic_model, NULL); Loading Loading @@ -1489,6 +1599,11 @@ static void __init populate_soc_sysfs_files(struct device *msm_soc_device) device_create_file(msm_soc_device, &images); switch (socinfo_format) { case SOCINFO_VERSION(0, 16): device_create_file(msm_soc_device, &msm_soc_attr_sku); device_create_file(msm_soc_device, &msm_soc_attr_esku); case SOCINFO_VERSION(0, 15): device_create_file(msm_soc_device, &msm_soc_attr_nmodem_supported); Loading Loading @@ -1787,6 +1902,31 @@ static void socinfo_print(void) socinfo->v0_15.nmodem_supported); break; case SOCINFO_VERSION(0, 16): pr_info("v%u.%u, id=%u, ver=%u.%u, raw_id=%u, raw_ver=%u, hw_plat=%u, hw_plat_ver=%u\n accessory_chip=%u, hw_plat_subtype=%u, pmic_model=%u, pmic_die_revision=%u foundry_id=%u serial_number=%u num_pmics=%u chip_family=0x%x raw_device_family=0x%x raw_device_number=0x%x nproduct_id=0x%x num_clusters=0x%x ncluster_array_offset=0x%x num_subset_parts=0x%x nsubset_parts_array_offset=0x%x nmodem_supported=0x%x sku=%s\n", f_maj, f_min, socinfo->v0_1.id, v_maj, v_min, socinfo->v0_2.raw_id, socinfo->v0_2.raw_version, socinfo->v0_3.hw_platform, socinfo->v0_4.platform_version, socinfo->v0_5.accessory_chip, socinfo->v0_6.hw_platform_subtype, socinfo->v0_7.pmic_model, socinfo->v0_7.pmic_die_revision, socinfo->v0_9.foundry_id, socinfo->v0_10.serial_number, socinfo->v0_11.num_pmics, socinfo->v0_12.chip_family, socinfo->v0_12.raw_device_family, socinfo->v0_12.raw_device_number, socinfo->v0_13.nproduct_id, socinfo->v0_14.num_clusters, socinfo->v0_14.ncluster_array_offset, socinfo->v0_14.num_subset_parts, socinfo->v0_14.nsubset_parts_array_offset, socinfo->v0_15.nmodem_supported, sku ? sku : "Unknown"); break; default: pr_err("Unknown format found: v%u.%u\n", f_maj, f_min); break; Loading Loading @@ -1819,6 +1959,7 @@ int __init socinfo_init(void) static bool socinfo_init_done; size_t size; uint32_t soc_info_id; const char *machine, *esku; if (socinfo_init_done) return 0; Loading @@ -1838,6 +1979,14 @@ int __init socinfo_init(void) (!cpu_of_id[soc_info_id].soc_id_string)) pr_warn("New IDs added! ID => CPU mapping needs an update.\n"); if (socinfo_format >= SOCINFO_VERSION(0, 16)) { machine = socinfo_get_id_string(); esku = socinfo_get_esku_mapping(); if (machine && esku) sku = kasprintf(GFP_KERNEL, "%s-%u-%s", machine, socinfo_get_nproduct_code(), esku); } cur_cpu = cpu_of_id[socinfo->v0_1.id].generic_soc_type; boot_stats_init(); socinfo_print(); Loading
include/dt-bindings/clock/qcom,gcc-scuba.h +2 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_QCOM_GCC_SCUBA_H Loading Loading @@ -155,6 +156,7 @@ #define GCC_VIDEO_VENUS_CLK_SRC 145 #define GCC_VIDEO_VENUS_CTL_CLK 146 #define GCC_VIDEO_XO_CLK 147 #define GCC_PWM0_XO512_DIV_CLK_SRC 148 /* GCC resets */ #define GCC_CAMSS_OPE_BCR 0 Loading