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Commit 5e7c58dc authored by Jean Pihet's avatar Jean Pihet Committed by Kevin Hilman
Browse files

perf: add OMAP support for the new power events 



The patch adds the new power management trace points for
the OMAP architecture.

The trace points are for:
- default idle handler. Since the cpuidle framework is
  instrumented in the generic way there is no need to
  add trace points in the OMAP specific cpuidle handler;
- SoC clocks changes (enable, disable, set_rate),
- power domain states: the desired target state and -if different-
  the actually hit state.

Because of the generic nature of the changes, OMAP3 and OMAP4 are supported.

Tested on OMAP3 with suspend/resume, cpuidle, basic DVFS.

Signed-off-by: default avatarJean Pihet <j-pihet@ti.com>
Acked-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent a271e58c

arch/arm/mach-omap2/clock.c

+9 −2
Original line number Diff line number Diff line
@@ -22,7 +22,9 @@ 
#include <linux/clk.h>

#include <linux/io.h>

#include <linux/bitops.h>

#include <trace/events/power.h>



#include <asm/cpu.h>

#include <plat/clock.h>

#include "clockdomain.h"

#include <plat/cpu.h>
@@ -261,8 +263,10 @@ void omap2_clk_disable(struct clk *clk) 


	pr_debug("clock: %s: disabling in hardware\n", clk->name);



	if (clk->ops && clk->ops->disable)

	if (clk->ops && clk->ops->disable) {

		trace_clock_disable(clk->name, 0, smp_processor_id());

		clk->ops->disable(clk);

	}



	if (clk->clkdm)

		clkdm_clk_disable(clk->clkdm, clk);
@@ -314,6 +318,7 @@ int omap2_clk_enable(struct clk *clk) 
	}



	if (clk->ops && clk->ops->enable) {

		trace_clock_enable(clk->name, 1, smp_processor_id());

		ret = clk->ops->enable(clk);

		if (ret) {

			WARN(1, "clock: %s: could not enable: %d\n",
@@ -353,8 +358,10 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate) 
	pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate);



	/* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */

	if (clk->set_rate)

	if (clk->set_rate) {

		trace_clock_set_rate(clk->name, rate, smp_processor_id());

		ret = clk->set_rate(clk, rate);

	}



	return ret;

}

arch/arm/mach-omap2/pm34xx.c

+7 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include <linux/delay.h>

#include <linux/slab.h>

#include <linux/console.h>

#include <trace/events/power.h>



#include <plat/sram.h>

#include "clockdomain.h"
@@ -519,8 +520,14 @@ static void omap3_pm_idle(void) 
	if (omap_irq_pending() || need_resched())

		goto out;



	trace_power_start(POWER_CSTATE, 1, smp_processor_id());

	trace_cpu_idle(1, smp_processor_id());



	omap_sram_idle();



	trace_power_end(smp_processor_id());

	trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());



out:

	local_fiq_enable();

	local_irq_enable();

arch/arm/mach-omap2/powerdomain.c

+23 −3
Original line number Diff line number Diff line
@@ -19,12 +19,15 @@ 
#include <linux/list.h>

#include <linux/errno.h>

#include <linux/string.h>

#include <trace/events/power.h>



#include "cm2xxx_3xxx.h"

#include "prcm44xx.h"

#include "cm44xx.h"

#include "prm2xxx_3xxx.h"

#include "prm44xx.h"



#include <asm/cpu.h>

#include <plat/cpu.h>

#include "powerdomain.h"

#include "clockdomain.h"
@@ -32,6 +35,8 @@ 


#include "pm.h"



#define PWRDM_TRACE_STATES_FLAG	(1<<31)



enum {

	PWRDM_STATE_NOW = 0,

	PWRDM_STATE_PREV,
@@ -130,8 +135,7 @@ static void _update_logic_membank_counters(struct powerdomain *pwrdm) 
static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)

{



	int prev;

	int state;

	int prev, state, trace_state = 0;



	if (pwrdm == NULL)

		return -EINVAL;
@@ -148,6 +152,17 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) 
			pwrdm->state_counter[prev]++;

		if (prev == PWRDM_POWER_RET)

			_update_logic_membank_counters(pwrdm);

		/*

		 * If the power domain did not hit the desired state,

		 * generate a trace event with both the desired and hit states

		 */

		if (state != prev) {

			trace_state = (PWRDM_TRACE_STATES_FLAG |

				       ((state & OMAP_POWERSTATE_MASK) << 8) |

				       ((prev & OMAP_POWERSTATE_MASK) << 0));

			trace_power_domain_target(pwrdm->name, trace_state,

						  smp_processor_id());

		}

		break;

	default:

		return -EINVAL;
@@ -406,8 +421,13 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) 
	pr_debug("powerdomain: setting next powerstate for %s to %0x\n",

		 pwrdm->name, pwrst);



	if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst)

	if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) {

		/* Trace the pwrdm desired target state */

		trace_power_domain_target(pwrdm->name, pwrst,

					  smp_processor_id());

		/* Program the pwrdm desired target state */

		ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst);

	}



	return ret;

}