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Commit 5deb67f7 authored by Robin Murphy's avatar Robin Murphy Committed by Dan Williams
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libnvdimm, nd_blk: remove mmio_flush_range() 



mmio_flush_range() suffers from a lack of clearly-defined semantics,
and is somewhat ambiguous to port to other architectures where the
scope of the writeback implied by "flush" and ordering might matter,
but MMIO would tend to imply non-cacheable anyway. Per the rationale
in 67a3e8fe ("nd_blk: change aperture mapping from WC to WB"), the
only existing use is actually to invalidate clean cache lines for
ARCH_MEMREMAP_PMEM type mappings *without* writeback. Since the recent
cleanup of the pmem API, that also now happens to be the exact purpose
of arch_invalidate_pmem(), which would be a far more well-defined tool
for the job.

Rather than risk potentially inconsistent implementations of
mmio_flush_range() for the sake of one callsite, streamline things by
removing it entirely and instead move the ARCH_MEMREMAP_PMEM related
definitions up to the libnvdimm level, so they can be shared by NFIT
as well. This allows NFIT to be enabled for arm64.

Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent d9b83c75

arch/x86/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -53,7 +53,6 @@ config X86 
	select ARCH_HAS_FORTIFY_SOURCE

	select ARCH_HAS_GCOV_PROFILE_ALL

	select ARCH_HAS_KCOV			if X86_64

	select ARCH_HAS_MMIO_FLUSH

	select ARCH_HAS_PMEM_API		if X86_64

	select ARCH_HAS_UACCESS_FLUSHCACHE	if X86_64

	select ARCH_HAS_SET_MEMORY

arch/x86/include/asm/cacheflush.h

+0 −2
Original line number Diff line number Diff line
@@ -7,6 +7,4 @@ 


void clflush_cache_range(void *addr, unsigned int size);



#define mmio_flush_range(addr, size) clflush_cache_range(addr, size)



#endif /* _ASM_X86_CACHEFLUSH_H */

drivers/acpi/nfit/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ config ACPI_NFIT 
	tristate "ACPI NVDIMM Firmware Interface Table (NFIT)"

	depends on PHYS_ADDR_T_64BIT

	depends on BLK_DEV

	depends on ARCH_HAS_MMIO_FLUSH

	depends on ARCH_HAS_PMEM_API

	select LIBNVDIMM

	help

	  Infrastructure to probe ACPI 6 compliant platforms for

drivers/acpi/nfit/core.c

+1 −1
Original line number Diff line number Diff line
@@ -1964,7 +1964,7 @@ static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, 
			memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c);

		else {

			if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)

				mmio_flush_range((void __force *)

				arch_invalidate_pmem((void __force *)

					mmio->addr.aperture + offset, c);



			memcpy(iobuf + copied, mmio->addr.aperture + offset, c);

drivers/nvdimm/pmem.h

+0 −14
Original line number Diff line number Diff line
@@ -5,20 +5,6 @@ 
#include <linux/pfn_t.h>

#include <linux/fs.h>



#ifdef CONFIG_ARCH_HAS_PMEM_API

#define ARCH_MEMREMAP_PMEM MEMREMAP_WB

void arch_wb_cache_pmem(void *addr, size_t size);

void arch_invalidate_pmem(void *addr, size_t size);

#else

#define ARCH_MEMREMAP_PMEM MEMREMAP_WT

static inline void arch_wb_cache_pmem(void *addr, size_t size)

{

}

static inline void arch_invalidate_pmem(void *addr, size_t size)

{

}

#endif



/* this definition is in it's own header for tools/testing/nvdimm to consume */

struct pmem_device {

	/* One contiguous memory region per device */