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Commit 5d91dcfa authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-dt64-4.18-1' of git://git.infradead.org/linux-mvebu into next/dt 

mvebu dt64 for 4.18 (part 1)

 - Allow using Armada 3700 gpio controller as interrupt one too
 - Describe SPI flash on the EspressoBin
 - Mark ahci as dma-coherent for Armada 7K/8K
 - Add 10G interface support Armada 7K/8K based boards (including MacBin)

* tag 'mvebu-dt64-4.18-1' of git://git.infradead.org/linux-mvebu

:
  arm64: dts: marvell: armada-37xx: mark the gpio controllers as irq controller
  arm64: dts: marvell: 7040-db: describe the 10G interface as fixed-link
  arm64: dts: marvell: 8040-db: describe the 10G interfaces as fixed-link
  arm64: dts: marvell: mcbin: enable the fourth network interface
  arm64: dts: marvell: mcbin: add 10G SFP support
  arm64: dts: marvell: mark CP110 ahci as dma-coherent
  arm64: dts: armada-3720-espressobin: wire up spi flash

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 4236c851 bd473ecd

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts

+27 −0
Original line number Diff line number Diff line
@@ -63,6 +63,33 @@ 
	status = "okay";

};



&spi0 {

	status = "okay";



	flash@0 {

		reg = <0>;

		compatible = "winbond,w25q32dw", "jedec,spi-flash";

		spi-max-frequency = <104000000>;

		m25p,fast-read;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "uboot";

				reg = <0 0x180000>;

			};



			partition@180000 {

				label = "ubootenv";

				reg = <0x180000 0x10000>;

			};

		};

	};

};



/* Exported on the micro USB connector J5 through an FTDI */

&uart0 {

	pinctrl-names = "default";

arch/arm64/boot/dts/marvell/armada-37xx.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -148,10 +148,13 @@ 
				compatible = "marvell,armada3710-nb-pinctrl",

					     "syscon", "simple-mfd";

				reg = <0x13800 0x100>, <0x13C00 0x20>;

				/* MPP1[19:0] */

				gpionb: gpio {

					#gpio-cells = <2>;

					gpio-ranges = <&pinctrl_nb 0 0 36>;

					gpio-controller;

					interrupt-controller;

					#interrupt-cells = <2>;

					interrupts =

					<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
@@ -209,10 +212,13 @@ 
				compatible = "marvell,armada3710-sb-pinctrl",

					     "syscon", "simple-mfd";

				reg = <0x18800 0x100>, <0x18C00 0x20>;

				/* MPP2[23:0] */

				gpiosb: gpio {

					#gpio-cells = <2>;

					gpio-ranges = <&pinctrl_sb 0 0 30>;

					gpio-controller;

					interrupt-controller;

					#interrupt-cells = <2>;

					interrupts =

					<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,

arch/arm64/boot/dts/marvell/armada-7040-db.dts

+5 −0
Original line number Diff line number Diff line
@@ -242,6 +242,11 @@ 
	phy-mode = "10gbase-kr";

	/* Generic PHY, providing serdes lanes */

	phys = <&cp0_comphy2 0>;



	fixed-link {

		speed = <10000>;

		full-duplex;

	};

};



&cp0_eth1 {

arch/arm64/boot/dts/marvell/armada-8040-db.dts

+10 −0
Original line number Diff line number Diff line
@@ -177,6 +177,11 @@ 
&cp0_eth0 {

	status = "okay";

	phy-mode = "10gbase-kr";



	fixed-link {

		speed = <10000>;

		full-duplex;

	};

};



&cp0_eth2 {
@@ -303,6 +308,11 @@ 
&cp1_eth0 {

	status = "okay";

	phy-mode = "10gbase-kr";



	fixed-link {

		speed = <10000>;

		full-duplex;

	};

};



&cp1_eth1 {

arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts

+70 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
		ethernet0 = &cp0_eth0;

		ethernet1 = &cp1_eth0;

		ethernet2 = &cp1_eth1;

		ethernet3 = &cp1_eth2;

	};



	/* Regulator labels correspond with schematics */
@@ -64,6 +65,42 @@ 
		compatible = "usb-nop-xceiv";

		vcc-supply = <&v_5v0_usb3_hst_vbus>;

	};



	sfp_eth0: sfp-eth0 {

		/* CON15,16 - CPM lane 4 */

		compatible = "sff,sfp";

		i2c-bus = <&sfpp0_i2c>;

		los-gpio = <&cp1_gpio1 28 GPIO_ACTIVE_HIGH>;

		mod-def0-gpio = <&cp1_gpio1 27 GPIO_ACTIVE_LOW>;

		tx-disable-gpio = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>;

		tx-fault-gpio  = <&cp1_gpio1 26 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&cp1_sfpp0_pins>;

	};



	sfp_eth1: sfp-eth1 {

		/* CON17,18 - CPS lane 4 */

		compatible = "sff,sfp";

		i2c-bus = <&sfpp1_i2c>;

		los-gpio = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>;

		mod-def0-gpio = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;

		tx-disable-gpio = <&cp1_gpio1 10 GPIO_ACTIVE_HIGH>;

		tx-fault-gpio = <&cp0_gpio2 30 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&cp1_sfpp1_pins &cp0_sfpp1_pins>;

	};



	sfp_eth3: sfp-eth3 {

		/* CON3,4 - CPS lane 5 */

		compatible = "sff,sfp";

		i2c-bus = <&sfp_1g_i2c>;

		los-gpio = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>;

		mod-def0-gpio = <&cp0_gpio2 21 GPIO_ACTIVE_LOW>;

		tx-disable-gpio = <&cp1_gpio1 24 GPIO_ACTIVE_HIGH>;

		tx-fault-gpio = <&cp0_gpio2 19 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&cp0_sfp_1g_pins &cp1_sfp_1g_pins>;

	};

};



&uart0 {
@@ -171,6 +208,10 @@ 
		marvell,pins = "mpp47";

		marvell,function = "gpio";

	};

	cp0_sfp_1g_pins: sfp-1g-pins {

		marvell,pins = "mpp51", "mpp53", "mpp54";

		marvell,function = "gpio";

	};

	cp0_pcie_pins: pcie-pins {

		marvell,pins = "mpp52";

		marvell,function = "gpio";
@@ -180,6 +221,10 @@ 
			       "mpp60", "mpp61";

		marvell,function = "sdio";

	};

	cp0_sfpp1_pins: sfpp1-pins {

		marvell,pins = "mpp62";

		marvell,function = "gpio";

	};

};



&cp0_xmdio {
@@ -188,11 +233,13 @@ 
	phy0: ethernet-phy@0 {

		compatible = "ethernet-phy-ieee802.3-c45";

		reg = <0>;

		sfp = <&sfp_eth0>;

	};



	phy8: ethernet-phy@8 {

		compatible = "ethernet-phy-ieee802.3-c45";

		reg = <8>;

		sfp = <&sfp_eth1>;

	};

};
@@ -257,7 +304,22 @@ 
	phys = <&cp1_comphy0 1>;

};



&cp1_eth2 {

	/* CPS Lane 5 */

	status = "okay";

	/* Network PHY */

	phy-mode = "2500base-x";

	managed = "in-band-status";

	/* Generic PHY, providing serdes lanes */

	phys = <&cp1_comphy5 2>;

	sfp = <&sfp_eth3>;

};



&cp1_pinctrl {

	cp1_sfpp1_pins: sfpp1-pins {

		marvell,pins = "mpp8", "mpp10", "mpp11";

		marvell,function = "gpio";

	};

	cp1_spi1_pins: spi1-pins {

		marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";

		marvell,function = "spi1";
@@ -266,6 +328,14 @@ 
		marvell,pins = "mpp6", "mpp7";

		marvell,function = "uart0";

	};

	cp1_sfp_1g_pins: sfp-1g-pins {

		marvell,pins = "mpp24";

		marvell,function = "gpio";

	};

	cp1_sfpp0_pins: sfpp0-pins {

		marvell,pins = "mpp26", "mpp27", "mpp28", "mpp29";

		marvell,function = "gpio";

	};

};



/* J27 UART header */