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Commit 5cbb5106 authored by Hollis Blanchard's avatar Hollis Blanchard Committed by Avi Kivity
Browse files

KVM: ppc: Move the last bits of 44x code out of booke.c 



Needed to port to other Book E processors.

Signed-off-by: default avatarHollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 75f74f0d

arch/powerpc/include/asm/kvm_ppc.h

+3 −0
Original line number Diff line number Diff line
@@ -62,7 +62,10 @@ extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid); 


/* Core-specific hooks */



extern int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu);

extern int kvmppc_core_check_processor_compat(void);

extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,

                                      struct kvm_translation *tr);



extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);

extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);

arch/powerpc/kvm/44x.c

+53 −0
Original line number Diff line number Diff line
@@ -121,3 +121,56 @@ int kvmppc_core_check_processor_compat(void) 


	return r;

}



int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)

{

	struct kvmppc_44x_tlbe *tlbe = &vcpu->arch.guest_tlb[0];



	tlbe->tid = 0;

	tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;

	tlbe->word1 = 0;

	tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;



	tlbe++;

	tlbe->tid = 0;

	tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;

	tlbe->word1 = 0xef600000;

	tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR

	              | PPC44x_TLB_I | PPC44x_TLB_G;



	/* Since the guest can directly access the timebase, it must know the

	 * real timebase frequency. Accordingly, it must see the state of

	 * CCR1[TCS]. */

	vcpu->arch.ccr1 = mfspr(SPRN_CCR1);



	return 0;

}



/* 'linear_address' is actually an encoding of AS|PID|EADDR . */

int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,

                               struct kvm_translation *tr)

{

	struct kvmppc_44x_tlbe *gtlbe;

	int index;

	gva_t eaddr;

	u8 pid;

	u8 as;



	eaddr = tr->linear_address;

	pid = (tr->linear_address >> 32) & 0xff;

	as = (tr->linear_address >> 40) & 0x1;



	index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);

	if (index == -1) {

		tr->valid = 0;

		return 0;

	}



	gtlbe = &vcpu->arch.guest_tlb[index];



	tr->physical_address = tlb_xlate(gtlbe, eaddr);

	/* XXX what does "writeable" and "usermode" even mean? */

	tr->valid = 1;



	return 0;

}

arch/powerpc/kvm/booke.c

+2 −44
Original line number Diff line number Diff line
@@ -479,20 +479,6 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 
/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */

int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)

{

	struct kvmppc_44x_tlbe *tlbe = &vcpu->arch.guest_tlb[0];



	tlbe->tid = 0;

	tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;

	tlbe->word1 = 0;

	tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;



	tlbe++;

	tlbe->tid = 0;

	tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;

	tlbe->word1 = 0xef600000;

	tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR

	              | PPC44x_TLB_I | PPC44x_TLB_G;



	vcpu->arch.pc = 0;

	vcpu->arch.msr = 0;

	vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
@@ -503,12 +489,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 
	 * before it's programmed its own IVPR. */

	vcpu->arch.ivpr = 0x55550000;



	/* Since the guest can directly access the timebase, it must know the

	 * real timebase frequency. Accordingly, it must see the state of

	 * CCR1[TCS]. */

	vcpu->arch.ccr1 = mfspr(SPRN_CCR1);



	return 0;

	return kvmppc_core_vcpu_setup(vcpu);

}



int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
@@ -586,33 +567,10 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 
	return -ENOTSUPP;

}



/* 'linear_address' is actually an encoding of AS|PID|EADDR . */

int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,

                                  struct kvm_translation *tr)

{

	struct kvmppc_44x_tlbe *gtlbe;

	int index;

	gva_t eaddr;

	u8 pid;

	u8 as;



	eaddr = tr->linear_address;

	pid = (tr->linear_address >> 32) & 0xff;

	as = (tr->linear_address >> 40) & 0x1;



	index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);

	if (index == -1) {

		tr->valid = 0;

		return 0;

	}



	gtlbe = &vcpu->arch.guest_tlb[index];



	tr->physical_address = tlb_xlate(gtlbe, eaddr);

	/* XXX what does "writeable" and "usermode" even mean? */

	tr->valid = 1;



	return 0;

	return kvmppc_core_vcpu_translate(vcpu, tr);

}



static int kvmppc_booke_init(void)