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Commit 5c770755 authored by Chris Metcalf's avatar Chris Metcalf
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drivers/edac: provide support for tile architecture



Add tile support for the EDAC driver, which provides unified system
error (memory, PCI, etc.) reporting. For now, the TILEPro port
reports memory correctable error (CE) only.

Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
parent d91c6412
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+1 −0
Original line number Diff line number Diff line
@@ -6082,6 +6082,7 @@ S: Supported
F:	arch/tile/
F:	drivers/char/hvc_tile.c
F:	drivers/net/tile/
F:	drivers/edac/tile_edac.c

TLAN NETWORK DRIVER
M:	Samuel Chessman <chessman@tux.org>
+29 −0
Original line number Diff line number Diff line
/*
 * Copyright 2011 Tilera Corporation. All Rights Reserved.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful, but
 *   WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *   NON INFRINGEMENT.  See the GNU General Public License for
 *   more details.
 */

#ifndef _ASM_TILE_EDAC_H
#define _ASM_TILE_EDAC_H

/* ECC atomic, DMA, SMP and interrupt safe scrub function */

static inline void atomic_scrub(void *va, u32 size)
{
	/*
	 * These is nothing to be done here because CE is
	 * corrected by the mshim.
	 */
	return;
}

#endif /* _ASM_TILE_EDAC_H */
+50 −0
Original line number Diff line number Diff line
/*
 * Copyright 2011 Tilera Corporation. All Rights Reserved.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful, but
 *   WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *   NON INFRINGEMENT.  See the GNU General Public License for
 *   more details.
 */

/**
 * @file drv_mshim_intf.h
 * Interface definitions for the Linux EDAC memory controller driver.
 */

#ifndef _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H
#define _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H

/** Number of memory controllers in the public API. */
#define TILE_MAX_MSHIMS 4

/** Memory info under each memory controller. */
struct mshim_mem_info
{
  uint64_t mem_size;     /**< Total memory size in bytes. */
  uint8_t mem_type;      /**< Memory type, DDR2 or DDR3. */
  uint8_t mem_ecc;       /**< Memory supports ECC. */
};

/**
 * DIMM error structure.
 * For now, only correctable errors are counted and the mshim doesn't record
 * the error PA. HV takes panic upon uncorrectable errors.
 */
struct mshim_mem_error
{
  uint32_t sbe_count;     /**< Number of single-bit errors. */
};

/** Read this offset to get the memory info per mshim. */
#define MSHIM_MEM_INFO_OFF 0x100

/** Read this offset to check DIMM error. */
#define MSHIM_MEM_ERROR_OFF 0x200

#endif /* _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H */
+40 −1
Original line number Diff line number Diff line
@@ -338,9 +338,10 @@ typedef int HV_Errno;
#define HV_ENOTREADY   -812  /**< Device not ready */
#define HV_EIO         -813  /**< I/O error */
#define HV_ENOMEM      -814  /**< Out of memory */
#define HV_EAGAIN      -815  /**< Try again */

#define HV_ERR_MAX     -801  /**< Largest HV error code */
#define HV_ERR_MIN     -814  /**< Smallest HV error code */
#define HV_ERR_MIN     -815  /**< Smallest HV error code */

#ifndef __ASSEMBLER__

@@ -867,6 +868,43 @@ typedef struct
 */
HV_PhysAddrRange hv_inquire_physical(int idx);

/** Possible DIMM types. */
typedef enum
{
  NO_DIMM                    = 0,  /**< No DIMM */
  DDR2                       = 1,  /**< DDR2 */
  DDR3                       = 2   /**< DDR3 */
} HV_DIMM_Type;

#ifdef __tilegx__

/** Log2 of minimum DIMM bytes supported by the memory controller. */
#define HV_MSH_MIN_DIMM_SIZE_SHIFT 29

/** Max number of DIMMs contained by one memory controller. */
#define HV_MSH_MAX_DIMMS 8

#else

/** Log2 of minimum DIMM bytes supported by the memory controller. */
#define HV_MSH_MIN_DIMM_SIZE_SHIFT 26

/** Max number of DIMMs contained by one memory controller. */
#define HV_MSH_MAX_DIMMS 2

#endif

/** Number of bits to right-shift to get the DIMM type. */
#define HV_DIMM_TYPE_SHIFT 0

/** Bits to mask to get the DIMM type. */
#define HV_DIMM_TYPE_MASK 0xf

/** Number of bits to right-shift to get the DIMM size. */
#define HV_DIMM_SIZE_SHIFT 4

/** Bits to mask to get the DIMM size. */
#define HV_DIMM_SIZE_MASK 0xf

/** Memory controller information. */
typedef struct
@@ -1043,6 +1081,7 @@ int hv_console_write(HV_VirtAddr bytes, int len);
 *  downcall:
 *
 *  INT_MESSAGE_RCV_DWNCL   (hypervisor message available)
 *  INT_DEV_INTR_DWNCL      (device interrupt)
 *  INT_DMATLB_MISS_DWNCL   (DMA TLB miss)
 *  INT_SNITLB_MISS_DWNCL   (SNI TLB miss)
 *  INT_DMATLB_ACCESS_DWNCL (DMA TLB access violation)
+9 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@
menuconfig EDAC
	bool "EDAC (Error Detection And Correction) reporting"
	depends on HAS_IOMEM
	depends on X86 || PPC
	depends on X86 || PPC || TILE
	help
	  EDAC is designed to report errors in the core system.
	  These are low-level errors that are reported in the CPU or
@@ -282,4 +282,12 @@ config EDAC_CPC925
	  a companion chip to the PowerPC 970 family of
	  processors.

config EDAC_TILE
	tristate "Tilera Memory Controller"
	depends on EDAC_MM_EDAC && TILE
	default y
	help
	  Support for error detection and correction on the
	  Tilera memory controller.

endif # EDAC
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