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Commit 5a9cfff4 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Include mbox details for pcode read/write failures 



If we fail at punit communication, include both the mbox address and the
value we tried to write so that we can identify the invalid sequence.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20170728085022.1586-1-chris@chris-wilson.co.uk


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent de44e256

drivers/gpu/drm/i915/intel_pm.c

+13 −8
Original line number Diff line number Diff line
@@ -8831,6 +8831,7 @@ static inline int gen6_check_mailbox_status(struct drm_i915_private *dev_priv) 
	case GEN6_PCODE_SUCCESS:

		return 0;

	case GEN6_PCODE_UNIMPLEMENTED_CMD:

		return -ENODEV;

	case GEN6_PCODE_ILLEGAL_CMD:

		return -ENXIO;

	case GEN6_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE:
@@ -8878,7 +8879,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val 
	 */



	if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {

		DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed\n");

		DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps\n",

				 mbox, __builtin_return_address(0));

		return -EAGAIN;

	}
@@ -8889,7 +8891,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val 
	if (__intel_wait_for_register_fw(dev_priv,

					 GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,

					 500, 0, NULL)) {

		DRM_ERROR("timeout waiting for pcode read (%d) to finish\n", mbox);

		DRM_ERROR("timeout waiting for pcode read (from mbox %x) to finish for %ps\n",

			  mbox, __builtin_return_address(0));

		return -ETIMEDOUT;

	}
@@ -8902,8 +8905,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val 
		status = gen6_check_mailbox_status(dev_priv);



	if (status) {

		DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed: %d\n",

				 status);

		DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n",

				 mbox, __builtin_return_address(0), status);

		return status;

	}
@@ -8923,7 +8926,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, 
	 */



	if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {

		DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed\n");

		DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps\n",

				 val, mbox, __builtin_return_address(0));

		return -EAGAIN;

	}
@@ -8934,7 +8938,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, 
	if (__intel_wait_for_register_fw(dev_priv,

					 GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,

					 500, 0, NULL)) {

		DRM_ERROR("timeout waiting for pcode write (%d) to finish\n", mbox);

		DRM_ERROR("timeout waiting for pcode write of 0x%08x to mbox %x to finish for %ps\n",

			  val, mbox, __builtin_return_address(0));

		return -ETIMEDOUT;

	}
@@ -8946,8 +8951,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, 
		status = gen6_check_mailbox_status(dev_priv);



	if (status) {

		DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed: %d\n",

				 status);

		DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n",

				 val, mbox, __builtin_return_address(0), status);

		return status;

	}