Loading drivers/scsi/ata_piix.c +13 −6 Original line number Original line Diff line number Diff line Loading @@ -38,6 +38,7 @@ enum { PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ ICH5_PMR = 0x90, /* port mapping register */ ICH5_PMR = 0x90, /* port mapping register */ ICH5_PCS = 0x92, /* port control and status */ ICH5_PCS = 0x92, /* port control and status */ PIIX_SCC = 0x0A, /* sub-class code register */ PIIX_FLAG_AHCI = (1 << 28), /* AHCI possible */ PIIX_FLAG_AHCI = (1 << 28), /* AHCI possible */ PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */ PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */ Loading @@ -62,6 +63,8 @@ enum { ich6_sata_rm = 4, ich6_sata_rm = 4, ich7_sata = 5, ich7_sata = 5, esb2_sata = 6, esb2_sata = 6, PIIX_AHCI_DEVICE = 6, }; }; static int piix_init_one (struct pci_dev *pdev, static int piix_init_one (struct pci_dev *pdev, Loading Loading @@ -626,10 +629,14 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) port_info[1] = NULL; port_info[1] = NULL; if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { u8 tmp; pci_read_config_byte(pdev, PIIX_SCC, &tmp); if (tmp == PIIX_AHCI_DEVICE) { int rc = piix_disable_ahci(pdev); int rc = piix_disable_ahci(pdev); if (rc) if (rc) return rc; return rc; } } } if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { u8 tmp; u8 tmp; Loading Loading
drivers/scsi/ata_piix.c +13 −6 Original line number Original line Diff line number Diff line Loading @@ -38,6 +38,7 @@ enum { PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ ICH5_PMR = 0x90, /* port mapping register */ ICH5_PMR = 0x90, /* port mapping register */ ICH5_PCS = 0x92, /* port control and status */ ICH5_PCS = 0x92, /* port control and status */ PIIX_SCC = 0x0A, /* sub-class code register */ PIIX_FLAG_AHCI = (1 << 28), /* AHCI possible */ PIIX_FLAG_AHCI = (1 << 28), /* AHCI possible */ PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */ PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */ Loading @@ -62,6 +63,8 @@ enum { ich6_sata_rm = 4, ich6_sata_rm = 4, ich7_sata = 5, ich7_sata = 5, esb2_sata = 6, esb2_sata = 6, PIIX_AHCI_DEVICE = 6, }; }; static int piix_init_one (struct pci_dev *pdev, static int piix_init_one (struct pci_dev *pdev, Loading Loading @@ -626,10 +629,14 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) port_info[1] = NULL; port_info[1] = NULL; if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { u8 tmp; pci_read_config_byte(pdev, PIIX_SCC, &tmp); if (tmp == PIIX_AHCI_DEVICE) { int rc = piix_disable_ahci(pdev); int rc = piix_disable_ahci(pdev); if (rc) if (rc) return rc; return rc; } } } if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { u8 tmp; u8 tmp; Loading