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Commit 5a52b1f2 authored by Jan Safrata's avatar Jan Safrata Committed by Dave Airlie
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drm/gma500: add support for atom e6xx lpc lvds i2c 



add gpio bitbanging i2c adapter on LPC device of atom e6xx
gpu chipset to access lvds EDID
tested on SECO QuadMo747-E6xx-EXTREME Qseven platform

Reviewed-by: default avatarPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Signed-off-by: default avatarJan Safrata <jan.nikitenko@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent e8115e79

drivers/gpu/drm/gma500/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ gma500_gfx-$(CONFIG_DRM_GMA3600) += cdv_device.o \ 
gma500_gfx-$(CONFIG_DRM_GMA600) += oaktrail_device.o \

	  oaktrail_crtc.o \

	  oaktrail_lvds.o \

	  oaktrail_lvds_i2c.o \

	  oaktrail_hdmi.o \

	  oaktrail_hdmi_i2c.o

drivers/gpu/drm/gma500/oaktrail_lvds.c

+19 −12
Original line number Diff line number Diff line
@@ -359,22 +359,26 @@ void oaktrail_lvds_init(struct drm_device *dev, 
	 *    if closed, act like it's not there for now

	 */



	edid = NULL;

	mutex_lock(&dev->mode_config.mutex);

	i2c_adap = i2c_get_adapter(dev_priv->ops->i2c_bus);

	if (i2c_adap == NULL)

		dev_err(dev->dev, "No ddc adapter available!\n");

	if (i2c_adap)

		edid = drm_get_edid(connector, i2c_adap);

	if (edid == NULL && dev_priv->lpc_gpio_base) {

		oaktrail_lvds_i2c_init(encoder);

		if (gma_encoder->ddc_bus != NULL) {

			i2c_adap = &gma_encoder->ddc_bus->adapter;

			edid = drm_get_edid(connector, i2c_adap);

		}

	}

	/*

	 * Attempt to get the fixed panel mode from DDC.  Assume that the

	 * preferred mode is the right one.

	 */

	if (i2c_adap) {

		edid = drm_get_edid(connector, i2c_adap);

	if (edid) {

			drm_mode_connector_update_edid_property(connector,

									edid);

		drm_mode_connector_update_edid_property(connector, edid);

		drm_add_edid_modes(connector, edid);

		kfree(edid);

		}



		list_for_each_entry(scan, &connector->probed_modes, head) {

			if (scan->type & DRM_MODE_TYPE_PREFERRED) {
@@ -383,7 +387,8 @@ void oaktrail_lvds_init(struct drm_device *dev, 
				goto out;	/* FIXME: check for quirks */

			}

		}

	}

	} else

		dev_err(dev->dev, "No ddc adapter available!\n");

	/*

	 * If we didn't get EDID, try geting panel timing

	 * from configuration data
@@ -411,8 +416,10 @@ void oaktrail_lvds_init(struct drm_device *dev, 
	mutex_unlock(&dev->mode_config.mutex);



	dev_dbg(dev->dev, "No LVDS modes found, disabling.\n");

	if (gma_encoder->ddc_bus)

	if (gma_encoder->ddc_bus) {

		psb_intel_i2c_destroy(gma_encoder->ddc_bus);

		gma_encoder->ddc_bus = NULL;

	}



/* failed_ddc: */

drivers/gpu/drm/gma500/oaktrail_lvds_i2c.c

0 → 100644
+170 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2002-2010, Intel Corporation.

 * Copyright (c) 2014 ATRON electronic GmbH

 *   Author: Jan Safrata <jan.nikitenko@gmail.com>

 *

 * Permission is hereby granted, free of charge, to any person obtaining a copy

 * of this software and associated documentation files (the "Software"), to deal

 * in the Software without restriction, including without limitation the rights

 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

 * copies of the Software, and to permit persons to whom the Software is

 * furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

 * THE SOFTWARE.

 *

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/pci.h>

#include <linux/types.h>

#include <linux/i2c.h>

#include <linux/i2c-algo-bit.h>

#include <linux/init.h>

#include <linux/io.h>

#include <linux/delay.h>



#include <drm/drmP.h>

#include "psb_drv.h"

#include "psb_intel_reg.h"





/*

 * LPC GPIO based I2C bus for LVDS of Atom E6xx

 */



/*-----------------------------------------------------------------------------

 * LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part

 * Atom E6xx [D31:F0]

 ----------------------------------------------------------------------------*/

#define RGEN    0x20

#define RGIO    0x24

#define RGLVL   0x28

#define RGTPE   0x2C

#define RGTNE   0x30

#define RGGPE   0x34

#define RGSMI   0x38

#define RGTS    0x3C



/* The LVDS GPIO clock lines are GPIOSUS[3]

 * The LVDS GPIO data lines are GPIOSUS[4]

 */

#define GPIO_CLOCK	0x08

#define GPIO_DATA	0x10



#define LPC_READ_REG(chan, r) inl((chan)->reg + (r))

#define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))



static int get_clock(void *data)

{

	struct psb_intel_i2c_chan *chan = data;

	u32 val, tmp;



	val = LPC_READ_REG(chan, RGIO);

	val |= GPIO_CLOCK;

	LPC_WRITE_REG(chan, RGIO, val);

	tmp = LPC_READ_REG(chan, RGLVL);

	val = (LPC_READ_REG(chan, RGLVL) & GPIO_CLOCK) ? 1 : 0;



	return val;

}



static int get_data(void *data)

{

	struct psb_intel_i2c_chan *chan = data;

	u32 val, tmp;



	val = LPC_READ_REG(chan, RGIO);

	val |= GPIO_DATA;

	LPC_WRITE_REG(chan, RGIO, val);

	tmp = LPC_READ_REG(chan, RGLVL);

	val = (LPC_READ_REG(chan, RGLVL) & GPIO_DATA) ? 1 : 0;



	return val;

}



static void set_clock(void *data, int state_high)

{

	struct psb_intel_i2c_chan *chan = data;

	u32 val;



	if (state_high) {

		val = LPC_READ_REG(chan, RGIO);

		val |= GPIO_CLOCK;

		LPC_WRITE_REG(chan, RGIO, val);

	} else {

		val = LPC_READ_REG(chan, RGIO);

		val &= ~GPIO_CLOCK;

		LPC_WRITE_REG(chan, RGIO, val);

		val = LPC_READ_REG(chan, RGLVL);

		val &= ~GPIO_CLOCK;

		LPC_WRITE_REG(chan, RGLVL, val);

	}

}



static void set_data(void *data, int state_high)

{

	struct psb_intel_i2c_chan *chan = data;

	u32 val;



	if (state_high) {

		val = LPC_READ_REG(chan, RGIO);

		val |= GPIO_DATA;

		LPC_WRITE_REG(chan, RGIO, val);

	} else {

		val = LPC_READ_REG(chan, RGIO);

		val &= ~GPIO_DATA;

		LPC_WRITE_REG(chan, RGIO, val);

		val = LPC_READ_REG(chan, RGLVL);

		val &= ~GPIO_DATA;

		LPC_WRITE_REG(chan, RGLVL, val);

	}

}



void oaktrail_lvds_i2c_init(struct drm_encoder *encoder)

{

	struct drm_device *dev = encoder->dev;

	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);

	struct drm_psb_private *dev_priv = dev->dev_private;

	struct psb_intel_i2c_chan *chan;



	chan = kzalloc(sizeof(struct psb_intel_i2c_chan), GFP_KERNEL);

	if (!chan)

		return;



	chan->drm_dev = dev;

	chan->reg = dev_priv->lpc_gpio_base;

	strncpy(chan->adapter.name, "gma500 LPC",  I2C_NAME_SIZE - 1);

	chan->adapter.owner = THIS_MODULE;

	chan->adapter.algo_data = &chan->algo;

	chan->adapter.dev.parent = &dev->pdev->dev;

	chan->algo.setsda = set_data;

	chan->algo.setscl = set_clock;

	chan->algo.getsda = get_data;

	chan->algo.getscl = get_clock;

	chan->algo.udelay = 100;

	chan->algo.timeout = usecs_to_jiffies(2200);

	chan->algo.data = chan;



	i2c_set_adapdata(&chan->adapter, chan);



	set_data(chan, 1);

	set_clock(chan, 1);

	udelay(50);



	if (i2c_bit_add_bus(&chan->adapter)) {

		kfree(chan);

		return;

	}



	gma_encoder->ddc_bus = chan;

}

drivers/gpu/drm/gma500/psb_drv.c

+20 −0
Original line number Diff line number Diff line
@@ -212,6 +212,8 @@ static int psb_driver_unload(struct drm_device *dev) 
		}

		if (dev_priv->aux_pdev)

			pci_dev_put(dev_priv->aux_pdev);

		if (dev_priv->lpc_pdev)

			pci_dev_put(dev_priv->lpc_pdev);



		/* Destroy VBT data */

		psb_intel_destroy_bios(dev);
@@ -280,6 +282,24 @@ static int psb_driver_load(struct drm_device *dev, unsigned long flags) 
			DRM_DEBUG_KMS("Couldn't find aux pci device");

		}

		dev_priv->gmbus_reg = dev_priv->aux_reg;



		dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0));

		if (dev_priv->lpc_pdev) {

			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,

				&dev_priv->lpc_gpio_base);

			pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,

				(u32)dev_priv->lpc_gpio_base | (1L<<31));

			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,

				&dev_priv->lpc_gpio_base);

			dev_priv->lpc_gpio_base &= 0xffc0;

			if (dev_priv->lpc_gpio_base)

				DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",

						dev_priv->lpc_gpio_base);

			else {

				pci_dev_put(dev_priv->lpc_pdev);

				dev_priv->lpc_pdev = NULL;

			}

		}

	} else {

		dev_priv->gmbus_reg = dev_priv->vdc_reg;

	}

drivers/gpu/drm/gma500/psb_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -83,6 +83,7 @@ enum { 
#define PSB_PGETBL_CTL		 0x2020

#define _PSB_PGETBL_ENABLED	 0x00000001

#define PSB_SGX_2D_SLAVE_PORT	 0x4000

#define PSB_LPC_GBA		 0x44



/* TODO: To get rid of */

#define PSB_TT_PRIV0_LIMIT	 (256*1024*1024)
@@ -441,6 +442,7 @@ struct psb_ops; 
struct drm_psb_private {

	struct drm_device *dev;

	struct pci_dev *aux_pdev; /* Currently only used by mrst */

	struct pci_dev *lpc_pdev; /* Currently only used by mrst */

	const struct psb_ops *ops;

	const struct psb_offset *regmap;
@@ -470,6 +472,7 @@ struct drm_psb_private { 
	uint8_t __iomem *sgx_reg;

	uint8_t __iomem *vdc_reg;

	uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */

	uint16_t lpc_gpio_base;

	uint32_t gatt_free_offset;



	/* Fencing / irq */